Subject: Re: [PATCH net-next] net: xilinx: axienet: Implement BQL

From: Sean Anderson <[email-masked]>
Date: Tue, 18 Feb 2025 11:00:52 -0500

On 2/15/25 06:32, Gupta, Suraj wrote:
> 
> 
>> -----Original Message-----
>> From: Sean Anderson <[email-masked]>
>> Sent: Saturday, February 15, 2025 2:43 AM
>> To: Pandey, Radhey Shyam <[email-masked]>;
>> [email-masked]
>> Cc: [email-masked]; Paolo Abeni <[email-masked]>; David S .
>> Miller <[email-masked]>; Jakub Kicinski <[email-masked]>; Simek, Michal
>> <[email-masked]>; [email-masked]; Eric Dumazet
>> <[email-masked]>; Andrew Lunn <[email-masked]>; Sean
>> Anderson <[email-masked]>
>> Subject: [PATCH net-next] net: xilinx: axienet: Implement BQL
>> 
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>> 
>> Implement byte queue limits to allow queueing disciplines to account for packets
>> enqueued in the ring buffers but not yet transmitted.
>> 
> 
> Could you please check if BQL can be implemented for DMAengine flow?

I can have a look, but TBH I do not test the dma engine configuration since it is
so much slower.

--Sean