Subject: Re: [PATCH net-next] net: airoha: Introduce airoha_fe_get()/airoha_qdma_get() register read helpers

From: Lorenzo Bianconi <[email-masked]>
Date: Wed, 29 Apr 2026 12:51:45 +0200

> Add airoha_fe_get() and airoha_qdma_get() as utility routines for reading
> a masked field from a specified register.
> This is a non-functional refactor, no logical changes are introduced to
> the existing codebase.
> 
> Signed-off-by: Lorenzo Bianconi <[email-masked]>
> ---
>  drivers/net/ethernet/airoha/airoha_eth.c | 13 ++++---------
>  drivers/net/ethernet/airoha/airoha_eth.h |  4 ++++
>  drivers/net/ethernet/airoha/airoha_ppe.c |  5 ++---
>  3 files changed, 10 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/net/ethernet/airoha/airoha_eth.c b/drivers/net/ethernet/airoha/airoha_eth.c
> index 2bb0a3ff9810..40b7a00c7d95 100644
> --- a/drivers/net/ethernet/airoha/airoha_eth.c
> +++ b/drivers/net/ethernet/airoha/airoha_eth.c
> @@ -201,15 +201,13 @@ static void airoha_fe_vip_setup(struct airoha_eth *eth)
>  static u32 airoha_fe_get_pse_queue_rsv_pages(struct airoha_eth *eth,
>  					     u32 port, u32 queue)
>  {
> -	u32 val;
> -
>  	airoha_fe_rmw(eth, REG_FE_PSE_QUEUE_CFG_WR,
>  		      PSE_CFG_PORT_ID_MASK | PSE_CFG_QUEUE_ID_MASK,
>  		      FIELD_PREP(PSE_CFG_PORT_ID_MASK, port) |
>  		      FIELD_PREP(PSE_CFG_QUEUE_ID_MASK, queue));
> -	val = airoha_fe_rr(eth, REG_FE_PSE_QUEUE_CFG_VAL);
>  
> -	return FIELD_GET(PSE_CFG_OQ_RSV_MASK, val);
> +	return airoha_fe_get(eth, REG_FE_PSE_QUEUE_CFG_VAL,
> +			     PSE_CFG_OQ_RSV_MASK);
>  }
>  
>  static void airoha_fe_set_pse_queue_rsv_pages(struct airoha_eth *eth,
> @@ -227,9 +225,7 @@ static void airoha_fe_set_pse_queue_rsv_pages(struct airoha_eth *eth,
>  
>  static u32 airoha_fe_get_pse_all_rsv(struct airoha_eth *eth)
>  {
> -	u32 val = airoha_fe_rr(eth, REG_FE_PSE_BUF_SET);
> -
> -	return FIELD_GET(PSE_ALLRSV_MASK, val);
> +	return airoha_fe_get(eth, REG_FE_PSE_BUF_SET, PSE_ALLRSV_MASK);
>  }
>  
>  static int airoha_fe_set_pse_oq_rsv(struct airoha_eth *eth,
> @@ -247,8 +243,7 @@ static int airoha_fe_set_pse_oq_rsv(struct airoha_eth *eth,
>  		      FIELD_PREP(PSE_ALLRSV_MASK, all_rsv));
>  
>  	/* modify hthd */
> -	tmp = airoha_fe_rr(eth, PSE_FQ_CFG);
> -	fq_limit = FIELD_GET(PSE_FQ_LIMIT_MASK, tmp);
> +	fq_limit = airoha_fe_get(eth, PSE_FQ_CFG, PSE_FQ_LIMIT_MASK);
>  	tmp = fq_limit - all_rsv - 0x20;
>  	airoha_fe_rmw(eth, REG_PSE_SHARE_USED_THD,
>  		      PSE_SHARE_USED_HTHD_MASK,
> diff --git a/drivers/net/ethernet/airoha/airoha_eth.h b/drivers/net/ethernet/airoha/airoha_eth.h
> index e389d2fe3b86..c81433d44e3e 100644
> --- a/drivers/net/ethernet/airoha/airoha_eth.h
> +++ b/drivers/net/ethernet/airoha/airoha_eth.h
> @@ -619,6 +619,8 @@ u32 airoha_rmw(void __iomem *base, u32 offset, u32 mask, u32 val);
>  	airoha_rmw((eth)->fe_regs, (offset), 0, (val))
>  #define airoha_fe_clear(eth, offset, val)			\
>  	airoha_rmw((eth)->fe_regs, (offset), (val), 0)
> +#define airoha_fe_get(eth, offset, mask)			\
> +	FIELD_GET((mask), airoha_fe_rr((eth), (offset)))
>  
>  #define airoha_qdma_rr(qdma, offset)				\
>  	airoha_rr((qdma)->regs, (offset))
> @@ -630,6 +632,8 @@ u32 airoha_rmw(void __iomem *base, u32 offset, u32 mask, u32 val);
>  	airoha_rmw((qdma)->regs, (offset), 0, (val))
>  #define airoha_qdma_clear(qdma, offset, val)			\
>  	airoha_rmw((qdma)->regs, (offset), (val), 0)
> +#define airoha_qdma_get(eth, offset, mask)			\
> +	FIELD_GET((mask), airoha_qdma_rr((eth), (offset)))

commenting on Sashiko's report:
https://sashiko.dev/#/patchset/20260428-airoha_fe_get-airoha_qdma_get-v1-1-6cfbdeb42743%40kernel.org

- This isn't a bug, but is the first parameter of airoha_qdma_get() supposed
  to be named qdma instead of eth?
  This is correct, I will fix it in v2.

Regards,
Lorenzo

>  
>  static inline bool airoha_is_lan_gdm_port(struct airoha_gdm_port *port)
>  {
> diff --git a/drivers/net/ethernet/airoha/airoha_ppe.c b/drivers/net/ethernet/airoha/airoha_ppe.c
> index 5c9dff6bccd1..697af6fdd4c3 100644
> --- a/drivers/net/ethernet/airoha/airoha_ppe.c
> +++ b/drivers/net/ethernet/airoha/airoha_ppe.c
> @@ -80,9 +80,8 @@ bool airoha_ppe_is_enabled(struct airoha_eth *eth, int index)
>  
>  static u32 airoha_ppe_get_timestamp(struct airoha_ppe *ppe)
>  {
> -	u16 timestamp = airoha_fe_rr(ppe->eth, REG_FE_FOE_TS);
> -
> -	return FIELD_GET(AIROHA_FOE_IB1_BIND_TIMESTAMP, timestamp);
> +	return airoha_fe_get(ppe->eth, REG_FE_FOE_TS,
> +			     AIROHA_FOE_IB1_BIND_TIMESTAMP);
>  }
>  
>  void airoha_ppe_set_cpu_port(struct airoha_gdm_port *port, u8 ppe_id, u8 fport)
> 
> ---
> base-commit: 790ead9394860e7d70c5e0e50a35b243e909a618
> change-id: 20260428-airoha_fe_get-airoha_qdma_get-7a087a23aef4
> 
> Best regards,
> -- 
> Lorenzo Bianconi <[email-masked]>
>