From: Krishna Reddy <vdumpa@nvidia•com>
Cc: snikam@nvidia•com, thomasz@nvidia•com, jtukkinen@nvidia•com,
mperttunen@nvidia•com, will@kernel•org, joro@8bytes•org,
linux-kernel@vger•kernel.org, praithatha@nvidia•com,
talho@nvidia•com, olof@lixom•net,
iommu@lists•linux-foundation.org, linux-tegra@vger•kernel.org,
yhsu@nvidia•com, treding@nvidia•com, robin.murphy@arm•com,
avanbrunt@nvidia•com, linux-arm-kernel@lists•infradead.org
Subject: [PATCH v2 7/7] arm64: tegra: enable SMMU for SDHCI and EQOS on T194
Date: Mon, 2 Sep 2019 20:32:08 -0700 [thread overview]
Message-ID: <1567481528-31163-8-git-send-email-vdumpa@nvidia.com> (raw)
In-Reply-To: <1567481528-31163-1-git-send-email-vdumpa@nvidia.com>
Enable SMMU translations for SDHCI and EQOS transactions on T194.
Signed-off-by: Krishna Reddy <vdumpa@nvidia•com>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 5ae3bbf..cac3462 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -51,6 +51,7 @@
clock-names = "master_bus", "slave_bus", "rx", "tx", "ptp_ref";
resets = <&bpmp TEGRA194_RESET_EQOS>;
reset-names = "eqos";
+ iommus = <&smmu TEGRA186_SID_EQOS>;
status = "disabled";
snps,write-requests = <1>;
@@ -381,6 +382,7 @@
clock-names = "sdhci";
resets = <&bpmp TEGRA194_RESET_SDMMC1>;
reset-names = "sdhci";
+ iommus = <&smmu TEGRA186_SID_SDMMC1>;
nvidia,pad-autocal-pull-up-offset-3v3-timeout =
<0x07>;
nvidia,pad-autocal-pull-down-offset-3v3-timeout =
@@ -403,6 +405,7 @@
clock-names = "sdhci";
resets = <&bpmp TEGRA194_RESET_SDMMC3>;
reset-names = "sdhci";
+ iommus = <&smmu TEGRA186_SID_SDMMC3>;
nvidia,pad-autocal-pull-up-offset-1v8 = <0x00>;
nvidia,pad-autocal-pull-down-offset-1v8 = <0x7a>;
nvidia,pad-autocal-pull-up-offset-3v3-timeout = <0x07>;
@@ -430,6 +433,7 @@
<&bpmp TEGRA194_CLK_PLLC4>;
resets = <&bpmp TEGRA194_RESET_SDMMC4>;
reset-names = "sdhci";
+ iommus = <&smmu TEGRA186_SID_SDMMC4>;
nvidia,pad-autocal-pull-up-offset-hs400 = <0x00>;
nvidia,pad-autocal-pull-down-offset-hs400 = <0x00>;
nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x0a>;
--
2.1.4
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prev parent reply other threads:[~2019-09-03 3:32 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-03 3:32 [PATCH v2 0/7] Nvidia Arm SMMUv2 Implementation Krishna Reddy
2019-09-03 3:32 ` [PATCH v2 1/7] iommu/arm-smmu: prepare arm_smmu_flush_ops for override Krishna Reddy
2019-09-03 3:32 ` [PATCH v2 2/7] iommu/arm-smmu: add NVIDIA implementation for dual ARM MMU-500 usage Krishna Reddy
2019-09-03 3:32 ` [PATCH v2 3/7] dt-bindings: arm-smmu: Add binding for Tegra194 SMMU Krishna Reddy
2019-09-03 3:32 ` [PATCH v2 4/7] iommu/arm-smmu: Add global/context fault implementation hooks Krishna Reddy
2019-09-03 3:32 ` [PATCH v2 5/7] arm64: tegra: Add Memory controller DT node on T194 Krishna Reddy
2019-09-03 3:32 ` [PATCH v2 6/7] arm64: tegra: Add DT node for T194 SMMU Krishna Reddy
2019-09-03 3:32 ` Krishna Reddy [this message]
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