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From: "Rob Herring (Arm)" <robh@kernel•org>
To: Thierry Reding <thierry.reding@kernel•org>
Cc: "Karthikeyan Mitran" <m.karthikeyan@mobiveil•co.in>,
	"Thierry Reding" <thierry.reding@gmail•com>,
	linux-kernel@vger•kernel.org,
	"Jonathan Hunter" <jonathanh@nvidia•com>,
	"Krzysztof Wilczyński" <kwilczynski@kernel•org>,
	"Michal Simek" <michal.simek@amd•com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin•com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel•org>,
	linux-arm-kernel@lists•infradead.org,
	"Kevin Xie" <kevin.xie@starfivetech•com>,
	"Bjorn Helgaas" <bhelgaas@google•com>,
	linux-tegra@vger•kernel.org,
	"Manivannan Sadhasivam" <mani@kernel•org>,
	"Conor Dooley" <conor+dt@kernel•org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel•org>,
	devicetree@vger•kernel.org, "Thierry Reding" <treding@nvidia•com>,
	linux-pci@vger•kernel.org, "Hou Zhiqiang" <Zhiqiang.Hou@nxp•com>,
	"Aksh Garg" <a-garg7@ti•com>, "Pali Rohár" <pali@kernel•org>
Subject: Re: [PATCH v6 1/4] dt-bindings: pci: Strictly distinguish C0 from C1-C5
Date: Tue, 02 Jun 2026 08:45:52 -0500	[thread overview]
Message-ID: <178040795218.231197.636617303245801505.robh@kernel.org> (raw)
In-Reply-To: <20260602-tegra264-pcie-v6-1-edbcfa7a78fe@nvidia.com>


On Tue, 02 Jun 2026 13:33:23 +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia•com>
> 
> Instead of using the ECAM registers as the first entry, strictly make a
> distinction between C0 and C1-C5. This is needed because otherwise the
> unit address doesn't match the first "reg" entry. We also cannot change
> the ordering of these nodes to follow the ECAM addresses because that
> would put them outside of their "control bus" hierarchy since the ECAM
> address space is a global one outside of any of the control busses.
> 
> Signed-off-by: Thierry Reding <treding@nvidia•com>
> ---
> Changes in v6:
> - add maxItems as suggested by Sashiko
> 
> Changes in v5:
> - rebase on top of v7.1-rc1, make it into a fix
> 
> Changes in v4:
> - ECAM is outside of the controller's region, so it cannot be the first
>   reg entry, otherwise we get warnings because it doesn't match the
>   unit-address, so revert back to oneOf construct
> 
> Changes in v2:
> - move ECAM region first and unify C0 vs. C1-C5
> - move unevaluatedProperties to right before the examples
> - add description to clarify the two types of controllers
> - add examples for C0 and C1-C5
> ---
>  .../bindings/pci/nvidia,tegra264-pcie.yaml         | 79 +++++++++++++++-------
>  1 file changed, 54 insertions(+), 25 deletions(-)
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/nvidia,tegra264-pcie.yaml: allOf:1:oneOf:0:properties:reg-names: {'maxItems': 4, 'items': [{'const': 'xal'}, {'const': 'xtl'}, {'const': 'xtl-pri'}, {'const': 'ecam'}]} should not be valid under {'required': ['maxItems']}
	hint: "maxItems" is not needed with an "items" list
	from schema $id: http://devicetree.org/meta-schemas/items.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/nvidia,tegra264-pcie.yaml: allOf:1:oneOf:0:properties:reg: {'maxItems': 4, 'items': [{'description': 'application layer registers'}, {'description': 'transaction layer registers'}, {'description': 'privileged transaction layer registers'}, {'description': 'ECAM compatible configuration space'}]} should not be valid under {'required': ['maxItems']}
	hint: "maxItems" is not needed with an "items" list
	from schema $id: http://devicetree.org/meta-schemas/items.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/nvidia,tegra264-pcie.yaml: allOf:1:oneOf:1:properties:reg-names: {'maxItems': 5, 'items': [{'const': 'xal'}, {'const': 'xtl'}, {'const': 'xtl-pri'}, {'const': 'xpl'}, {'const': 'ecam'}]} should not be valid under {'required': ['maxItems']}
	hint: "maxItems" is not needed with an "items" list
	from schema $id: http://devicetree.org/meta-schemas/items.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/nvidia,tegra264-pcie.yaml: allOf:1:oneOf:1:properties:reg: {'maxItems': 5, 'items': [{'description': 'application layer registers'}, {'description': 'transaction layer registers'}, {'description': 'privileged transaction layer registers'}, {'description': 'data link/physical layer registers'}, {'description': 'ECAM compatible configuration space'}]} should not be valid under {'required': ['maxItems']}
	hint: "maxItems" is not needed with an "items" list
	from schema $id: http://devicetree.org/meta-schemas/items.yaml

doc reference errors (make refcheckdocs):

See https://patchwork.kernel.org/project/devicetree/patch/20260602-tegra264-pcie-v6-1-edbcfa7a78fe@nvidia.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.



  reply	other threads:[~2026-06-02 13:46 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-02 11:33 [PATCH v6 0/4] PCI: tegra: Add Tegra264 support Thierry Reding
2026-06-02 11:33 ` [PATCH v6 1/4] dt-bindings: pci: Strictly distinguish C0 from C1-C5 Thierry Reding
2026-06-02 13:45   ` Rob Herring (Arm) [this message]
2026-06-02 15:40   ` Rob Herring
2026-06-02 11:33 ` [PATCH v6 2/4] PCI: Use standard wait times for PCIe link monitoring Thierry Reding
2026-06-02 11:33 ` [PATCH v6 3/4] PCI: tegra: Add Tegra264 support Thierry Reding
2026-06-02 16:49   ` Jon Hunter
2026-06-02 11:33 ` [PATCH v6 4/4] arm64: tegra: Reorder reg and reg-names to match bindings Thierry Reding

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