From: catalin.marinas@arm•com (Catalin Marinas)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v7 07/11] arm64: mm: Implement 4 levels of translation tables
Date: Thu, 14 Aug 2014 13:58:24 +0100 [thread overview]
Message-ID: <20140814125823.GD9039@arm.com> (raw)
In-Reply-To: <CAFpQJXU_8HTaL5s+gyZKA7F6HS_jeAfOrEwahEe0P-EKo1FaHA@mail.gmail.com>
On Thu, Aug 14, 2014 at 12:42:12PM +0100, Ganapatrao Kulkarni wrote:
> IMHO, the Macro MAX_PHYSMEM_BITS needs to be set to 48 in file
> arch/arm64/include/asm/sparsemem.h
>
> with 40 bit set, for RAM address beyond 40 bit, seeeing below warning message.
> WARNING: CPU: 0 PID: 0 at mm/sparse.c:164
> mminit_validate_memmodel_limits+0xf8/0x118()
I agree. Would you mind sending a patch?
Thanks.
--
Catalin
next prev parent reply other threads:[~2014-08-14 12:58 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CAGoO6fLT6B_vx+Wtm6bKHD6YkjQcM8f=deD7SDP3BR_uC+1c5w@mail.gmail.com>
2014-07-29 13:47 ` [PATCH v7 07/11] arm64: mm: Implement 4 levels of translation tables Jungseok Lee
2014-07-29 14:19 ` Joel Schopp
2014-07-30 14:57 ` Jungseok Lee
2014-08-14 11:42 ` Ganapatrao Kulkarni
2014-08-14 12:58 ` Catalin Marinas [this message]
2014-08-14 13:47 ` Ganapatrao Kulkarni
[not found] <2211E520-32A4-435C-9F63-A7EFEE8B677A@gmail.com>
2014-07-17 15:04 ` Jungseok Lee
2014-07-17 16:47 ` Catalin Marinas
2014-07-16 19:09 [PATCH v7 00/11] arm64: Support " Catalin Marinas
2014-07-16 19:09 ` [PATCH v7 07/11] arm64: mm: Implement " Catalin Marinas
2014-07-28 15:40 ` Joel Schopp
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