From: joel.schopp@amd•com (Joel Schopp)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v7 07/11] arm64: mm: Implement 4 levels of translation tables
Date: Tue, 29 Jul 2014 09:19:38 -0500 [thread overview]
Message-ID: <53D7AD7A.8050706@amd.com> (raw)
In-Reply-To: <ACF42928-55EE-4466-B217-982839BB98C4@gmail.com>
>> Here's a good example of where we run into trouble equating page table
>> addressable bits with hardware addressable bits. If VA_BITS is 48 due
>> to 4K 4 level page tables but is running on a 42 bit system this will
>> end up being out of range.
> Is your concern that CPU issues 48-bit address to MMU on 42-bit hardware?
> Have you tested this patch series on your hardware?
>
> - Jungseok Lee
That is my concern. I did test the patch on my hardware with the
following results:
64k pages, 2 levels 42 bit VA - worked (no regression)
64k pages, 3 levels 48 bit VA- didn't boot
4k pages, 4 levels 42 bit VA - didn't boot
4k pages, 4 levels 48 bit VA - didn't boot
next prev parent reply other threads:[~2014-07-29 14:19 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CAGoO6fLT6B_vx+Wtm6bKHD6YkjQcM8f=deD7SDP3BR_uC+1c5w@mail.gmail.com>
2014-07-29 13:47 ` [PATCH v7 07/11] arm64: mm: Implement 4 levels of translation tables Jungseok Lee
2014-07-29 14:19 ` Joel Schopp [this message]
2014-07-30 14:57 ` Jungseok Lee
2014-08-14 11:42 ` Ganapatrao Kulkarni
2014-08-14 12:58 ` Catalin Marinas
2014-08-14 13:47 ` Ganapatrao Kulkarni
[not found] <2211E520-32A4-435C-9F63-A7EFEE8B677A@gmail.com>
2014-07-17 15:04 ` Jungseok Lee
2014-07-17 16:47 ` Catalin Marinas
2014-07-16 19:09 [PATCH v7 00/11] arm64: Support " Catalin Marinas
2014-07-16 19:09 ` [PATCH v7 07/11] arm64: mm: Implement " Catalin Marinas
2014-07-28 15:40 ` Joel Schopp
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