* [PATCH v5 1/3] dt-bindings: pci: layerscape-pci: add compatible strings "fsl, ls1028a-pcie"
@ 2019-09-01 7:41 Xiaowei Bao
2019-09-01 7:41 ` [PATCH v5 2/3] arm64: dts: ls1028a: Add PCIe controller DT nodes Xiaowei Bao
2019-09-01 7:41 ` [PATCH v5 3/3] PCI: layerscape: Add LS1028a support Xiaowei Bao
0 siblings, 2 replies; 3+ messages in thread
From: Xiaowei Bao @ 2019-09-01 7:41 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, leoyang.li, minghuan.Lian,
mingkai.hu, roy.zang, lorenzo.pieralisi, linux-pci, devicetree,
linux-kernel, linux-arm-kernel, linuxppc-dev
Cc: bhelgaas, Hou Zhiqiang, Xiaowei Bao
Add the PCIe compatible string for LS1028A
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp•com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp•com>
Reviewed-by: Rob Herring <robh@kernel•org>
---
v2:
- No change.
v3:
- No change.
v4:
- No change.
v5:
- No change.
Documentation/devicetree/bindings/pci/layerscape-pci.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
index e20ceaa..99a386e 100644
--- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
+++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
@@ -21,6 +21,7 @@ Required properties:
"fsl,ls1046a-pcie"
"fsl,ls1043a-pcie"
"fsl,ls1012a-pcie"
+ "fsl,ls1028a-pcie"
EP mode:
"fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"
- reg: base addresses and lengths of the PCIe controller register blocks.
--
2.9.5
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^ permalink raw reply related [flat|nested] 3+ messages in thread* [PATCH v5 2/3] arm64: dts: ls1028a: Add PCIe controller DT nodes
2019-09-01 7:41 [PATCH v5 1/3] dt-bindings: pci: layerscape-pci: add compatible strings "fsl, ls1028a-pcie" Xiaowei Bao
@ 2019-09-01 7:41 ` Xiaowei Bao
2019-09-01 7:41 ` [PATCH v5 3/3] PCI: layerscape: Add LS1028a support Xiaowei Bao
1 sibling, 0 replies; 3+ messages in thread
From: Xiaowei Bao @ 2019-09-01 7:41 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, leoyang.li, minghuan.Lian,
mingkai.hu, roy.zang, lorenzo.pieralisi, linux-pci, devicetree,
linux-kernel, linux-arm-kernel, linuxppc-dev
Cc: bhelgaas, Hou Zhiqiang, Xiaowei Bao
LS1028a implements 2 PCIe 3.0 controllers.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp•com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp•com>
---
v2:
- Fix up the legacy INTx allocate failed issue.
v3:
- No change.
v4:
- Remove the num-lanes property.
v5:
- Add the num-viewport property.
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 52 ++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 72b9a75..c043b1d 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -625,6 +625,58 @@
};
};
+ pcie@3400000 {
+ compatible = "fsl,ls1028a-pcie";
+ reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
+ 0x80 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
+ <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
+ interrupt-names = "pme", "aer";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ dma-coherent;
+ num-viewport = <6>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&its>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ pcie@3500000 {
+ compatible = "fsl,ls1028a-pcie";
+ reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
+ 0x88 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pme", "aer";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ dma-coherent;
+ num-viewport = <6>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&its>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
pcie@1f0000000 { /* Integrated Endpoint Root Complex */
compatible = "pci-host-ecam-generic";
reg = <0x01 0xf0000000 0x0 0x100000>;
--
2.9.5
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^ permalink raw reply related [flat|nested] 3+ messages in thread* [PATCH v5 3/3] PCI: layerscape: Add LS1028a support
2019-09-01 7:41 [PATCH v5 1/3] dt-bindings: pci: layerscape-pci: add compatible strings "fsl, ls1028a-pcie" Xiaowei Bao
2019-09-01 7:41 ` [PATCH v5 2/3] arm64: dts: ls1028a: Add PCIe controller DT nodes Xiaowei Bao
@ 2019-09-01 7:41 ` Xiaowei Bao
1 sibling, 0 replies; 3+ messages in thread
From: Xiaowei Bao @ 2019-09-01 7:41 UTC (permalink / raw)
To: robh+dt, mark.rutland, shawnguo, leoyang.li, minghuan.Lian,
mingkai.hu, roy.zang, lorenzo.pieralisi, linux-pci, devicetree,
linux-kernel, linux-arm-kernel, linuxppc-dev
Cc: bhelgaas, Hou Zhiqiang, Xiaowei Bao
Add support for the LS1028a PCIe controller.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp•com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp•com>
---
v2:
- No change.
v3:
- Reuse the ls2088 driver data structurt.
v4:
- No change.
v5:
- No change.
drivers/pci/controller/dwc/pci-layerscape.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/controller/dwc/pci-layerscape.c b/drivers/pci/controller/dwc/pci-layerscape.c
index 3a5fa26..f24f79a 100644
--- a/drivers/pci/controller/dwc/pci-layerscape.c
+++ b/drivers/pci/controller/dwc/pci-layerscape.c
@@ -263,6 +263,7 @@ static const struct ls_pcie_drvdata ls2088_drvdata = {
static const struct of_device_id ls_pcie_of_match[] = {
{ .compatible = "fsl,ls1012a-pcie", .data = &ls1046_drvdata },
{ .compatible = "fsl,ls1021a-pcie", .data = &ls1021_drvdata },
+ { .compatible = "fsl,ls1028a-pcie", .data = &ls2088_drvdata },
{ .compatible = "fsl,ls1043a-pcie", .data = &ls1043_drvdata },
{ .compatible = "fsl,ls1046a-pcie", .data = &ls1046_drvdata },
{ .compatible = "fsl,ls2080a-pcie", .data = &ls2080_drvdata },
--
2.9.5
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2019-09-01 7:53 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2019-09-01 7:41 [PATCH v5 1/3] dt-bindings: pci: layerscape-pci: add compatible strings "fsl, ls1028a-pcie" Xiaowei Bao
2019-09-01 7:41 ` [PATCH v5 2/3] arm64: dts: ls1028a: Add PCIe controller DT nodes Xiaowei Bao
2019-09-01 7:41 ` [PATCH v5 3/3] PCI: layerscape: Add LS1028a support Xiaowei Bao
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