From: Manikandan Muralidharan <manikandan.m@microchip•com>
To: <maarten.lankhorst@linux•intel.com>, <mripard@kernel•org>,
<tzimmermann@suse•de>, <airlied@gmail•com>, <simona@ffwll•ch>,
<nicolas.ferre@microchip•com>, <alexandre.belloni@bootlin•com>,
<claudiu.beznea@tuxon•dev>, <lee@kernel•org>,
<dri-devel@lists•freedesktop.org>,
<linux-arm-kernel@lists•infradead.org>,
<linux-kernel@vger•kernel.org>
Cc: <manikandan.m@microchip•com>
Subject: [PATCH 1/8] drm: atmel-hlcdc: Fix off-by-one in vertical back porch setting
Date: Tue, 19 May 2026 14:31:28 +0530 [thread overview]
Message-ID: <20260519090135.1188405-2-manikandan.m@microchip.com> (raw)
In-Reply-To: <20260519090135.1188405-1-manikandan.m@microchip.com>
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The vertical back porch field in ATMEL_HLCDC_CFG(2) was programmed
without subtracting 1, unlike the other timing parameters which follow
the controller’s (value - 1) encoding requirement.
This results in an off-by-one error in the vertical back porch timing.
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip•com>
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index 9dbac2def333..7932d666e9ec 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -115,7 +115,7 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
(vm.hsync_len - 1) | ((vm.vsync_len - 1) << 16));
regmap_write(regmap, ATMEL_HLCDC_CFG(2),
- (vm.vfront_porch - 1) | (vm.vback_porch << 16));
+ (vm.vfront_porch - 1) | ((vm.vback_porch - 1) << 16));
regmap_write(regmap, ATMEL_HLCDC_CFG(3),
(vm.hfront_porch - 1) | ((vm.hback_porch - 1) << 16));
--
2.25.1
next prev parent reply other threads:[~2026-05-19 9:02 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-19 9:01 [PATCH 0/8] drm: atmel-hlcdc: fix clock handling and add LVDS support Manikandan Muralidharan
2026-05-19 9:01 ` Manikandan Muralidharan [this message]
2026-05-19 9:01 ` [PATCH 2/8] drm: atmel-hlcdc: reorder timing register writes after clock setup Manikandan Muralidharan
2026-05-19 9:01 ` [PATCH 3/8] drm: atmel-hlcdc: simplify clock divider selection with DIV_ROUND_CLOSEST Manikandan Muralidharan
2026-05-19 9:01 ` [PATCH 4/8] drm: atmel-hlcdc: define ATMEL_HLCDC_CLKDIV_MAX and fix divider fallback Manikandan Muralidharan
2026-05-19 9:01 ` [PATCH 5/8] drm: atmel-hlcdc: extract clock setup into a dedicated helper Manikandan Muralidharan
2026-05-19 9:01 ` [PATCH 6/8] drm: atmel-hlcdc: add XLCDC clock bypass support for small dividers Manikandan Muralidharan
2026-05-27 14:55 ` Lee Jones
2026-05-19 9:01 ` [PATCH 7/8] drm: atmel-hlcdc: add and configure LVDS PLL clock support Manikandan Muralidharan
2026-05-19 9:01 ` [PATCH 8/8] drm: atmel-hlcdc: add LVDS output mode support Manikandan Muralidharan
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