From: Manikandan Muralidharan <manikandan.m@microchip•com>
To: <maarten.lankhorst@linux•intel.com>, <mripard@kernel•org>,
<tzimmermann@suse•de>, <airlied@gmail•com>, <simona@ffwll•ch>,
<nicolas.ferre@microchip•com>, <alexandre.belloni@bootlin•com>,
<claudiu.beznea@tuxon•dev>, <lee@kernel•org>,
<dri-devel@lists•freedesktop.org>,
<linux-arm-kernel@lists•infradead.org>,
<linux-kernel@vger•kernel.org>
Cc: <manikandan.m@microchip•com>, Ryan Wanner <Ryan.Wanner@microchip•com>
Subject: [PATCH 2/8] drm: atmel-hlcdc: reorder timing register writes after clock setup
Date: Tue, 19 May 2026 14:31:29 +0530 [thread overview]
Message-ID: <20260519090135.1188405-3-manikandan.m@microchip.com> (raw)
In-Reply-To: <20260519090135.1188405-1-manikandan.m@microchip.com>
From: Ryan Wanner <Ryan.Wanner@microchip•com>
Write CFG(1-4) timing registers after CFG(0) clock configuration
rather than before, as required by the datasheet procedure.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip•com>
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip•com>
---
.../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 43 ++++++++++---------
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index 7932d666e9ec..9673fbce42a7 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -104,26 +104,6 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
if (ret)
return;
- vm.vfront_porch = adj->crtc_vsync_start - adj->crtc_vdisplay;
- vm.vback_porch = adj->crtc_vtotal - adj->crtc_vsync_end;
- vm.vsync_len = adj->crtc_vsync_end - adj->crtc_vsync_start;
- vm.hfront_porch = adj->crtc_hsync_start - adj->crtc_hdisplay;
- vm.hback_porch = adj->crtc_htotal - adj->crtc_hsync_end;
- vm.hsync_len = adj->crtc_hsync_end - adj->crtc_hsync_start;
-
- regmap_write(regmap, ATMEL_HLCDC_CFG(1),
- (vm.hsync_len - 1) | ((vm.vsync_len - 1) << 16));
-
- regmap_write(regmap, ATMEL_HLCDC_CFG(2),
- (vm.vfront_porch - 1) | ((vm.vback_porch - 1) << 16));
-
- regmap_write(regmap, ATMEL_HLCDC_CFG(3),
- (vm.hfront_porch - 1) | ((vm.hback_porch - 1) << 16));
-
- regmap_write(regmap, ATMEL_HLCDC_CFG(4),
- (adj->crtc_hdisplay - 1) |
- ((adj->crtc_vdisplay - 1) << 16));
-
prate = clk_get_rate(crtc->dc->hlcdc->sys_clk);
mode_rate = adj->crtc_clock * 1000;
if (!crtc->dc->desc->fixed_clksrc) {
@@ -164,6 +144,29 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0), mask, cfg);
+ vm.vfront_porch = adj->crtc_vsync_start - adj->crtc_vdisplay;
+ vm.vback_porch = adj->crtc_vtotal - adj->crtc_vsync_end;
+ vm.vsync_len = adj->crtc_vsync_end - adj->crtc_vsync_start;
+ vm.hfront_porch = adj->crtc_hsync_start - adj->crtc_hdisplay;
+ vm.hback_porch = adj->crtc_htotal - adj->crtc_hsync_end;
+ vm.hsync_len = adj->crtc_hsync_end - adj->crtc_hsync_start;
+
+ regmap_write(regmap, ATMEL_HLCDC_CFG(1),
+ (vm.hsync_len - 1) |
+ ((vm.vsync_len - 1) << 16));
+
+ regmap_write(regmap, ATMEL_HLCDC_CFG(2),
+ (vm.vfront_porch - 1) |
+ ((vm.vback_porch - 1) << 16));
+
+ regmap_write(regmap, ATMEL_HLCDC_CFG(3),
+ (vm.hfront_porch - 1) |
+ ((vm.hback_porch - 1) << 16));
+
+ regmap_write(regmap, ATMEL_HLCDC_CFG(4),
+ (adj->crtc_hdisplay - 1) |
+ ((adj->crtc_vdisplay - 1) << 16));
+
state = drm_crtc_state_to_atmel_hlcdc_crtc_state(c->state);
cfg = state->output_mode << 8;
--
2.25.1
next prev parent reply other threads:[~2026-05-19 9:02 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-19 9:01 [PATCH 0/8] drm: atmel-hlcdc: fix clock handling and add LVDS support Manikandan Muralidharan
2026-05-19 9:01 ` [PATCH 1/8] drm: atmel-hlcdc: Fix off-by-one in vertical back porch setting Manikandan Muralidharan
2026-05-19 9:01 ` Manikandan Muralidharan [this message]
2026-05-19 9:01 ` [PATCH 3/8] drm: atmel-hlcdc: simplify clock divider selection with DIV_ROUND_CLOSEST Manikandan Muralidharan
2026-05-19 9:01 ` [PATCH 4/8] drm: atmel-hlcdc: define ATMEL_HLCDC_CLKDIV_MAX and fix divider fallback Manikandan Muralidharan
2026-05-19 9:01 ` [PATCH 5/8] drm: atmel-hlcdc: extract clock setup into a dedicated helper Manikandan Muralidharan
2026-05-19 9:01 ` [PATCH 6/8] drm: atmel-hlcdc: add XLCDC clock bypass support for small dividers Manikandan Muralidharan
2026-05-27 14:55 ` Lee Jones
2026-05-19 9:01 ` [PATCH 7/8] drm: atmel-hlcdc: add and configure LVDS PLL clock support Manikandan Muralidharan
2026-05-19 9:01 ` [PATCH 8/8] drm: atmel-hlcdc: add LVDS output mode support Manikandan Muralidharan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260519090135.1188405-3-manikandan.m@microchip.com \
--to=manikandan.m@microchip$(echo .)com \
--cc=Ryan.Wanner@microchip$(echo .)com \
--cc=airlied@gmail$(echo .)com \
--cc=alexandre.belloni@bootlin$(echo .)com \
--cc=claudiu.beznea@tuxon$(echo .)dev \
--cc=dri-devel@lists$(echo .)freedesktop.org \
--cc=lee@kernel$(echo .)org \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
--cc=linux-kernel@vger$(echo .)kernel.org \
--cc=maarten.lankhorst@linux$(echo .)intel.com \
--cc=mripard@kernel$(echo .)org \
--cc=nicolas.ferre@microchip$(echo .)com \
--cc=simona@ffwll$(echo .)ch \
--cc=tzimmermann@suse$(echo .)de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox