From: phucduc.bui@gmail•com
To: broonie@kernel•org
Cc: lgirdwood@gmail•com, perex@perex•cz, tiwai@suse•com,
heiko@sntech•de, linux-arm-kernel@lists•infradead.org,
linux-kernel@vger•kernel.org, linux-sound@vger•kernel.org,
linux-rockchip@lists•infradead.org, robh@kernel•org,
krzk+dt@kernel•org, conor+dt@kernel•org,
devicetree@vger•kernel.org, bui duc phuc <phucduc.bui@gmail•com>
Subject: [PATCH 2/3] ASoC: rockchip: spdif: Reorder clock enable sequence
Date: Fri, 22 May 2026 17:03:17 +0700 [thread overview]
Message-ID: <20260522100318.73474-3-phucduc.bui@gmail.com> (raw)
In-Reply-To: <20260522100318.73474-1-phucduc.bui@gmail.com>
From: bui duc phuc <phucduc.bui@gmail•com>
Enable the 'hclk' bus clock before the 'mclk' controller
clock during runtime resume.
The bus clock provides the register access interface and
should be enabled before the controller clock.
Signed-off-by: bui duc phuc <phucduc.bui@gmail•com>
---
sound/soc/rockchip/rockchip_spdif.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c
index 581624f2682e..8de5b76cfe79 100644
--- a/sound/soc/rockchip/rockchip_spdif.c
+++ b/sound/soc/rockchip/rockchip_spdif.c
@@ -76,16 +76,16 @@ static int rk_spdif_runtime_resume(struct device *dev)
struct rk_spdif_dev *spdif = dev_get_drvdata(dev);
int ret;
- ret = clk_prepare_enable(spdif->mclk);
+ ret = clk_prepare_enable(spdif->hclk);
if (ret) {
- dev_err(spdif->dev, "mclk clock enable failed %d\n", ret);
+ dev_err(spdif->dev, "hclk clock enable failed %d\n", ret);
return ret;
}
- ret = clk_prepare_enable(spdif->hclk);
+ ret = clk_prepare_enable(spdif->mclk);
if (ret) {
- clk_disable_unprepare(spdif->mclk);
- dev_err(spdif->dev, "hclk clock enable failed %d\n", ret);
+ clk_disable_unprepare(spdif->hclk);
+ dev_err(spdif->dev, "mclk clock enable failed %d\n", ret);
return ret;
}
--
2.43.0
next prev parent reply other threads:[~2026-05-22 10:03 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-22 10:03 [PATCH 0/3] ASoC: rockchip: Reorder clock enable sequence phucduc.bui
2026-05-22 10:03 ` [PATCH 1/3] ASoC: dt-bindings: rockchip-spdif: Correct SPDIF clock descriptions phucduc.bui
2026-05-30 10:44 ` Krzysztof Kozlowski
2026-06-01 10:05 ` Bui Duc Phuc
2026-05-22 10:03 ` phucduc.bui [this message]
2026-05-22 10:03 ` [PATCH 3/3] ASoC: rockchip: rockchip_pdm: Reorder clock enable sequence phucduc.bui
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