From: joakim.zhang@cixtech•com
To: mturquette@baylibre•com, sboyd@kernel•org, bmasney@redhat•com,
robh@kernel•org, krzk+dt@kernel•org, conor+dt@kernel•org,
p.zabel@pengutronix•de, gary.yang@cixtech•com
Cc: cix-kernel-upstream@cixtech•com, linux-clk@vger•kernel.org,
devicetree@vger•kernel.org, linux-kernel@vger•kernel.org,
linux-arm-kernel@lists•infradead.org,
Joakim Zhang <joakim.zhang@cixtech•com>
Subject: [PATCH v2 5/5] arm64: dts: cix: sky1: add audss system control
Date: Fri, 5 Jun 2026 11:22:25 +0800 [thread overview]
Message-ID: <20260605032225.523669-6-joakim.zhang@cixtech.com> (raw)
In-Reply-To: <20260605032225.523669-1-joakim.zhang@cixtech.com>
From: Joakim Zhang <joakim.zhang@cixtech•com>
Add audss system control device node, which would provides
clocks and resets for devices in audss domain.
Signed-off-by: Joakim Zhang <joakim.zhang@cixtech•com>
---
arch/arm64/boot/dts/cix/sky1.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
index bb5cfb1f2113..0edc35523c71 100644
--- a/arch/arm64/boot/dts/cix/sky1.dtsi
+++ b/arch/arm64/boot/dts/cix/sky1.dtsi
@@ -6,6 +6,10 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/cix,sky1.h>
+#include <dt-bindings/clock/cix,sky1-audss.h>
+#include <dt-bindings/reset/cix,sky1-system-control.h>
+#include <dt-bindings/reset/cix,sky1-s5-system-control.h>
+#include <dt-bindings/reset/cix,sky1-audss-system-control.h>
#include "sky1-power.h"
/ {
@@ -488,6 +492,30 @@ mbox_pm2ap: mailbox@65a0080 {
cix,mbox-dir = "rx";
};
+ audss_cru: system-controller@7110000 {
+ compatible = "cix,sky1-audss-system-control", "simple-mfd", "syscon";
+ reg = <0x0 0x07110000 0x0 0x10000>;
+ #reset-cells = <1>;
+ status = "okay";
+
+ audss_clk: clock-controller {
+ compatible = "cix,sky1-audss-clock";
+ power-domains = <&smc_devpd SKY1_PD_AUDIO>;
+ resets = <&s5_syscon SKY1_AUDIO_HIFI5_NOC_RESET_N>;
+ clocks = <&scmi_clk CLK_TREE_AUDIO_CLK0>,
+ <&scmi_clk CLK_TREE_AUDIO_CLK1>,
+ <&scmi_clk CLK_TREE_AUDIO_CLK2>,
+ <&scmi_clk CLK_TREE_AUDIO_CLK3>,
+ <&scmi_clk CLK_TREE_AUDIO_CLK4>,
+ <&scmi_clk CLK_TREE_AUDIO_CLK5>;
+ clock-names = "audio_clk0", "audio_clk1",
+ "audio_clk2", "audio_clk3",
+ "audio_clk4", "audio_clk5";
+ #clock-cells = <1>;
+ status = "okay";
+ };
+ };
+
mbox_sfh2ap: mailbox@8090000 {
compatible = "cix,sky1-mbox";
reg = <0x0 0x08090000 0x0 0x10000>;
--
2.50.1
prev parent reply other threads:[~2026-06-05 3:23 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-05 3:22 [PATCH v2 0/5] Add Cix Sky1 AUDSS clock and reset support joakim.zhang
2026-06-05 3:22 ` [PATCH v2 1/5] dt-bindings: soc: cix,sky1-system-control: add audss system control joakim.zhang
2026-06-05 4:40 ` Rob Herring (Arm)
2026-06-05 3:22 ` [PATCH v2 2/5] reset: cix: add audss support to sky1 reset driver joakim.zhang
2026-06-05 3:22 ` [PATCH v2 3/5] dt-bindings: clock: cix,sky1-audss-clock: add audss clock controller joakim.zhang
2026-06-05 3:22 ` [PATCH v2 4/5] clk: cix: add sky1 " joakim.zhang
2026-06-05 7:42 ` Philipp Zabel
2026-06-05 3:22 ` joakim.zhang [this message]
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