* [PATCH 1/5] drm/rockchip: vop2: Fix wrong wait target in layer cfg done check
2026-05-04 18:23 [PATCH 0/5] drm/rockchip: vop2: Fix layer cfg done timeout on multi-output setups Cristian Ciocaltea
@ 2026-05-04 18:23 ` Cristian Ciocaltea
2026-06-01 10:44 ` Andy Yan
2026-05-04 18:24 ` [PATCH 2/5] drm/rockchip: vop2: Wait for layer cfg done before switching LAYERSEL_REGDONE_SEL Cristian Ciocaltea
` (5 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Cristian Ciocaltea @ 2026-05-04 18:23 UTC (permalink / raw)
To: Sandy Huang, Heiko Stübner, Andy Yan, Maarten Lankhorst,
Maxime Ripard, Thomas Zimmermann, David Airlie, Simona Vetter
Cc: kernel, dri-devel, linux-arm-kernel, linux-rockchip, linux-kernel
rk3568_vop2_setup_layer_mixer() waits for the previous Video Port (VP)
layer configuration to take effect before writing a new one to the
shared RK3568_OVL_LAYER_SEL shadow register. However, it passes
vop2->old_layer_sel to rk3568_vop2_wait_for_layer_cfg_done() as the
expected value, which at that point already contains the new VP layer.
This causes the wait to poll for a value that has not been written to
the shadow register yet, resulting in spurious timeouts when two
non-blocking atomic commits race:
rockchip-drm display-subsystem: [drm] *ERROR* wait layer cfg done timeout [...]
Pass the local old_layer_sel instead, which still holds the value
captured from vop2->old_layer_sel before it was overwritten, i.e. the
previous VP target that the hardware is expected to latch.
Fixes: 3e89a8c68354 ("drm/rockchip: vop2: Fix the update of LAYER/PORT select registers when there are multi display output on rk3588/rk3568")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora•com>
---
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
index 02a788a4dfdd..edca0fb16e08 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
@@ -2307,7 +2307,7 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
* Changes of other VPs' overlays have not taken effect
*/
if (cfg_done)
- rk3568_vop2_wait_for_layer_cfg_done(vop2, vop2->old_layer_sel);
+ rk3568_vop2_wait_for_layer_cfg_done(vop2, old_layer_sel);
}
vop2_writel(vop2, RK3568_OVL_LAYER_SEL, layer_sel);
--
2.53.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 1/5] drm/rockchip: vop2: Fix wrong wait target in layer cfg done check
2026-05-04 18:23 ` [PATCH 1/5] drm/rockchip: vop2: Fix wrong wait target in layer cfg done check Cristian Ciocaltea
@ 2026-06-01 10:44 ` Andy Yan
0 siblings, 0 replies; 12+ messages in thread
From: Andy Yan @ 2026-06-01 10:44 UTC (permalink / raw)
To: Cristian Ciocaltea, Sandy Huang, Heiko Stübner,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie,
Simona Vetter
Cc: kernel, dri-devel, linux-arm-kernel, linux-rockchip, linux-kernel
Hello,
On 5/5/26 02:23, Cristian Ciocaltea wrote:
> rk3568_vop2_setup_layer_mixer() waits for the previous Video Port (VP)
> layer configuration to take effect before writing a new one to the
> shared RK3568_OVL_LAYER_SEL shadow register. However, it passes
> vop2->old_layer_sel to rk3568_vop2_wait_for_layer_cfg_done() as the
> expected value, which at that point already contains the new VP layer.
>
> This causes the wait to poll for a value that has not been written to
> the shadow register yet, resulting in spurious timeouts when two
> non-blocking atomic commits race:
>
> rockchip-drm display-subsystem: [drm] *ERROR* wait layer cfg done timeout [...]
>
> Pass the local old_layer_sel instead, which still holds the value
> captured from vop2->old_layer_sel before it was overwritten, i.e. the
> previous VP target that the hardware is expected to latch.
>
> Fixes: 3e89a8c68354 ("drm/rockchip: vop2: Fix the update of LAYER/PORT select registers when there are multi display output on rk3588/rk3568")
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora•com>
Reviewed-by: Andy Yan <andy.yan@rock-chips•com>
> ---
> drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
> index 02a788a4dfdd..edca0fb16e08 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
> @@ -2307,7 +2307,7 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
> * Changes of other VPs' overlays have not taken effect
> */
> if (cfg_done)
> - rk3568_vop2_wait_for_layer_cfg_done(vop2, vop2->old_layer_sel);
> + rk3568_vop2_wait_for_layer_cfg_done(vop2, old_layer_sel);
> }
>
> vop2_writel(vop2, RK3568_OVL_LAYER_SEL, layer_sel);
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/5] drm/rockchip: vop2: Wait for layer cfg done before switching LAYERSEL_REGDONE_SEL
2026-05-04 18:23 [PATCH 0/5] drm/rockchip: vop2: Fix layer cfg done timeout on multi-output setups Cristian Ciocaltea
2026-05-04 18:23 ` [PATCH 1/5] drm/rockchip: vop2: Fix wrong wait target in layer cfg done check Cristian Ciocaltea
@ 2026-05-04 18:24 ` Cristian Ciocaltea
2026-06-01 10:45 ` Andy Yan
2026-05-04 18:24 ` [PATCH 3/5] drm/rockchip: vop2: Delay old_{layer|port}_sel updates in setup_layer_mixer() Cristian Ciocaltea
` (4 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Cristian Ciocaltea @ 2026-05-04 18:24 UTC (permalink / raw)
To: Sandy Huang, Heiko Stübner, Andy Yan, Maarten Lankhorst,
Maxime Ripard, Thomas Zimmermann, David Airlie, Simona Vetter
Cc: kernel, dri-devel, linux-arm-kernel, linux-rockchip, linux-kernel
LAYERSEL_REGDONE_SEL mask of RK3568_OVL_CTRL register controls which
Video Port (VP) vsync latches the shared RK3568_OVL_{LAYER|PORT}_SEL
shadow registers into the active configuration.
rk3568_vop2_setup_layer_mixer() overwrites LAYERSEL_REGDONE_SEL to the
current VP ID before waiting for the previous VP layer configuration to
take effect. As a consequence, the previous VP vsync can no longer
trigger the latch, so the wait polls a value that might never appear.
Move the layer cfg done wait before the RK3568_OVL_CTRL write so the
previous VP vsync can still commit the pending configuration.
Fixes: 3e89a8c68354 ("drm/rockchip: vop2: Fix the update of LAYER/PORT select registers when there are multi display output on rk3588/rk3568")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora•com>
---
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 19 ++++++++++---------
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
index edca0fb16e08..5206f01ec787 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
@@ -2289,15 +2289,6 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
* lead to the configuration of the previous VP being take effect along with the VSYNC
* of the new VP.
*/
- if (layer_sel != old_layer_sel || port_sel != old_port_sel)
- ovl_ctrl |= FIELD_PREP(RK3568_OVL_CTRL__LAYERSEL_REGDONE_SEL, vp->id);
- vop2_writel(vop2, RK3568_OVL_CTRL, ovl_ctrl);
-
- if (port_sel != old_port_sel) {
- vop2_writel(vop2, RK3568_OVL_PORT_SEL, port_sel);
- vop2_cfg_done(vp);
- rk3568_vop2_wait_for_port_mux_done(vop2);
- }
if (layer_sel != old_layer_sel && atv_layer_sel != old_layer_sel) {
cfg_done = vop2_readl(vop2, RK3568_REG_CFG_DONE);
@@ -2310,6 +2301,16 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
rk3568_vop2_wait_for_layer_cfg_done(vop2, old_layer_sel);
}
+ if (layer_sel != old_layer_sel || port_sel != old_port_sel)
+ ovl_ctrl |= FIELD_PREP(RK3568_OVL_CTRL__LAYERSEL_REGDONE_SEL, vp->id);
+ vop2_writel(vop2, RK3568_OVL_CTRL, ovl_ctrl);
+
+ if (port_sel != old_port_sel) {
+ vop2_writel(vop2, RK3568_OVL_PORT_SEL, port_sel);
+ vop2_cfg_done(vp);
+ rk3568_vop2_wait_for_port_mux_done(vop2);
+ }
+
vop2_writel(vop2, RK3568_OVL_LAYER_SEL, layer_sel);
mutex_unlock(&vop2->ovl_lock);
}
--
2.53.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 2/5] drm/rockchip: vop2: Wait for layer cfg done before switching LAYERSEL_REGDONE_SEL
2026-05-04 18:24 ` [PATCH 2/5] drm/rockchip: vop2: Wait for layer cfg done before switching LAYERSEL_REGDONE_SEL Cristian Ciocaltea
@ 2026-06-01 10:45 ` Andy Yan
0 siblings, 0 replies; 12+ messages in thread
From: Andy Yan @ 2026-06-01 10:45 UTC (permalink / raw)
To: Cristian Ciocaltea, Sandy Huang, Heiko Stübner,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie,
Simona Vetter
Cc: kernel, dri-devel, linux-arm-kernel, linux-rockchip, linux-kernel
Hello,
On 5/5/26 02:24, Cristian Ciocaltea wrote:
> LAYERSEL_REGDONE_SEL mask of RK3568_OVL_CTRL register controls which
> Video Port (VP) vsync latches the shared RK3568_OVL_{LAYER|PORT}_SEL
> shadow registers into the active configuration.
>
> rk3568_vop2_setup_layer_mixer() overwrites LAYERSEL_REGDONE_SEL to the
> current VP ID before waiting for the previous VP layer configuration to
> take effect. As a consequence, the previous VP vsync can no longer
> trigger the latch, so the wait polls a value that might never appear.
>
> Move the layer cfg done wait before the RK3568_OVL_CTRL write so the
> previous VP vsync can still commit the pending configuration.
>
> Fixes: 3e89a8c68354 ("drm/rockchip: vop2: Fix the update of LAYER/PORT select registers when there are multi display output on rk3588/rk3568")
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora•com>
Reviewed-by: Andy Yan <andy.yan@rock-chips•com>
> ---
> drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 19 ++++++++++---------
> 1 file changed, 10 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
> index edca0fb16e08..5206f01ec787 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
> @@ -2289,15 +2289,6 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
> * lead to the configuration of the previous VP being take effect along with the VSYNC
> * of the new VP.
> */
> - if (layer_sel != old_layer_sel || port_sel != old_port_sel)
> - ovl_ctrl |= FIELD_PREP(RK3568_OVL_CTRL__LAYERSEL_REGDONE_SEL, vp->id);
> - vop2_writel(vop2, RK3568_OVL_CTRL, ovl_ctrl);
> -
> - if (port_sel != old_port_sel) {
> - vop2_writel(vop2, RK3568_OVL_PORT_SEL, port_sel);
> - vop2_cfg_done(vp);
> - rk3568_vop2_wait_for_port_mux_done(vop2);
> - }
>
> if (layer_sel != old_layer_sel && atv_layer_sel != old_layer_sel) {
> cfg_done = vop2_readl(vop2, RK3568_REG_CFG_DONE);
> @@ -2310,6 +2301,16 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
> rk3568_vop2_wait_for_layer_cfg_done(vop2, old_layer_sel);
> }
>
> + if (layer_sel != old_layer_sel || port_sel != old_port_sel)
> + ovl_ctrl |= FIELD_PREP(RK3568_OVL_CTRL__LAYERSEL_REGDONE_SEL, vp->id);
> + vop2_writel(vop2, RK3568_OVL_CTRL, ovl_ctrl);
> +
> + if (port_sel != old_port_sel) {
> + vop2_writel(vop2, RK3568_OVL_PORT_SEL, port_sel);
> + vop2_cfg_done(vp);
> + rk3568_vop2_wait_for_port_mux_done(vop2);
> + }
> +
> vop2_writel(vop2, RK3568_OVL_LAYER_SEL, layer_sel);
> mutex_unlock(&vop2->ovl_lock);
> }
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 3/5] drm/rockchip: vop2: Delay old_{layer|port}_sel updates in setup_layer_mixer()
2026-05-04 18:23 [PATCH 0/5] drm/rockchip: vop2: Fix layer cfg done timeout on multi-output setups Cristian Ciocaltea
2026-05-04 18:23 ` [PATCH 1/5] drm/rockchip: vop2: Fix wrong wait target in layer cfg done check Cristian Ciocaltea
2026-05-04 18:24 ` [PATCH 2/5] drm/rockchip: vop2: Wait for layer cfg done before switching LAYERSEL_REGDONE_SEL Cristian Ciocaltea
@ 2026-05-04 18:24 ` Cristian Ciocaltea
2026-05-04 18:24 ` [PATCH 4/5] drm/rockchip: vop2: Drop redundant zero-init " Cristian Ciocaltea
` (3 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Cristian Ciocaltea @ 2026-05-04 18:24 UTC (permalink / raw)
To: Sandy Huang, Heiko Stübner, Andy Yan, Maarten Lankhorst,
Maxime Ripard, Thomas Zimmermann, David Airlie, Simona Vetter
Cc: kernel, dri-devel, linux-arm-kernel, linux-rockchip, linux-kernel
The old_layer_sel and old_port_sel local variables were introduced to
hold the previous VP configuration for comparisons and wait targets,
working around the premature update of vop2->old_layer_sel and
vop2->old_port_sel earlier in the function.
Remove these superfluous locals and instead defer the assignments of
vop2->old_layer_sel and vop2->old_port_sel to just before the
corresponding shadow register writes, where the transition from old to
new logically belongs.
No functional change intended.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora•com>
---
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 21 +++++++++------------
1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
index 5206f01ec787..1f5e8c2acecd 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
@@ -2136,9 +2136,7 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
struct drm_plane *plane;
u32 layer_sel = 0;
u32 port_sel;
- u32 old_layer_sel = 0;
u32 atv_layer_sel = 0;
- u32 old_port_sel = 0;
u8 layer_id;
u8 old_layer_id;
u8 layer_sel_id;
@@ -2161,8 +2159,7 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
else
ovl_ctrl &= ~RK3568_OVL_CTRL__YUV_MODE(vp->id);
- old_port_sel = vop2->old_port_sel;
- port_sel = old_port_sel;
+ port_sel = vop2->old_port_sel;
port_sel &= RK3568_OVL_PORT_SEL__SEL_PORT;
if (vp0->nlayers)
@@ -2188,8 +2185,7 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
port_sel |= FIELD_PREP(RK3588_OVL_PORT_SET__PORT3_MUX, 7);
atv_layer_sel = vop2_readl(vop2, RK3568_OVL_LAYER_SEL);
- old_layer_sel = vop2->old_layer_sel;
- layer_sel = old_layer_sel;
+ layer_sel = vop2->old_layer_sel;
ofs = 0;
for (i = 0; i < vp->id; i++)
@@ -2273,8 +2269,6 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
old_win->data->layer_sel_id[vp->id]);
}
- vop2->old_layer_sel = layer_sel;
- vop2->old_port_sel = port_sel;
/*
* As the RK3568_OVL_LAYER_SEL and RK3568_OVL_PORT_SEL are shared by all Video Ports,
* and the configuration take effect by one Video Port's vsync.
@@ -2290,7 +2284,7 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
* of the new VP.
*/
- if (layer_sel != old_layer_sel && atv_layer_sel != old_layer_sel) {
+ if (layer_sel != vop2->old_layer_sel && atv_layer_sel != vop2->old_layer_sel) {
cfg_done = vop2_readl(vop2, RK3568_REG_CFG_DONE);
cfg_done &= (BIT(vop2->data->nr_vps) - 1);
cfg_done &= ~BIT(vp->id);
@@ -2298,20 +2292,23 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
* Changes of other VPs' overlays have not taken effect
*/
if (cfg_done)
- rk3568_vop2_wait_for_layer_cfg_done(vop2, old_layer_sel);
+ rk3568_vop2_wait_for_layer_cfg_done(vop2, vop2->old_layer_sel);
}
- if (layer_sel != old_layer_sel || port_sel != old_port_sel)
+ if (layer_sel != vop2->old_layer_sel || port_sel != vop2->old_port_sel)
ovl_ctrl |= FIELD_PREP(RK3568_OVL_CTRL__LAYERSEL_REGDONE_SEL, vp->id);
vop2_writel(vop2, RK3568_OVL_CTRL, ovl_ctrl);
- if (port_sel != old_port_sel) {
+ if (port_sel != vop2->old_port_sel) {
+ vop2->old_port_sel = port_sel;
vop2_writel(vop2, RK3568_OVL_PORT_SEL, port_sel);
vop2_cfg_done(vp);
rk3568_vop2_wait_for_port_mux_done(vop2);
}
+ vop2->old_layer_sel = layer_sel;
vop2_writel(vop2, RK3568_OVL_LAYER_SEL, layer_sel);
+
mutex_unlock(&vop2->ovl_lock);
}
--
2.53.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 4/5] drm/rockchip: vop2: Drop redundant zero-init in setup_layer_mixer()
2026-05-04 18:23 [PATCH 0/5] drm/rockchip: vop2: Fix layer cfg done timeout on multi-output setups Cristian Ciocaltea
` (2 preceding siblings ...)
2026-05-04 18:24 ` [PATCH 3/5] drm/rockchip: vop2: Delay old_{layer|port}_sel updates in setup_layer_mixer() Cristian Ciocaltea
@ 2026-05-04 18:24 ` Cristian Ciocaltea
2026-06-01 10:46 ` Andy Yan
2026-05-04 18:24 ` [PATCH 5/5] drm/rockchip: vop2: Use vop2->old_layer_sel directly in wait_for_layer_cfg_done() Cristian Ciocaltea
` (2 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Cristian Ciocaltea @ 2026-05-04 18:24 UTC (permalink / raw)
To: Sandy Huang, Heiko Stübner, Andy Yan, Maarten Lankhorst,
Maxime Ripard, Thomas Zimmermann, David Airlie, Simona Vetter
Cc: kernel, dri-devel, linux-arm-kernel, linux-rockchip, linux-kernel
The layer_sel and atv_layer_sel local variables in
rk3568_vop2_setup_layer_mixer() are unconditionally assigned from
vop2->old_layer_sel and the RK3568_OVL_LAYER_SEL register read,
respectively, before any use.
Remove the superfluous zero-initializers.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora•com>
---
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
index 1f5e8c2acecd..0849bd922ffb 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
@@ -2134,9 +2134,9 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
{
struct vop2 *vop2 = vp->vop2;
struct drm_plane *plane;
- u32 layer_sel = 0;
+ u32 layer_sel;
u32 port_sel;
- u32 atv_layer_sel = 0;
+ u32 atv_layer_sel;
u8 layer_id;
u8 old_layer_id;
u8 layer_sel_id;
--
2.53.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 4/5] drm/rockchip: vop2: Drop redundant zero-init in setup_layer_mixer()
2026-05-04 18:24 ` [PATCH 4/5] drm/rockchip: vop2: Drop redundant zero-init " Cristian Ciocaltea
@ 2026-06-01 10:46 ` Andy Yan
0 siblings, 0 replies; 12+ messages in thread
From: Andy Yan @ 2026-06-01 10:46 UTC (permalink / raw)
To: Cristian Ciocaltea, Sandy Huang, Heiko Stübner,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie,
Simona Vetter
Cc: kernel, dri-devel, linux-arm-kernel, linux-rockchip, linux-kernel
Hello,
On 5/5/26 02:24, Cristian Ciocaltea wrote:
> The layer_sel and atv_layer_sel local variables in
> rk3568_vop2_setup_layer_mixer() are unconditionally assigned from
> vop2->old_layer_sel and the RK3568_OVL_LAYER_SEL register read,
> respectively, before any use.
>
> Remove the superfluous zero-initializers.
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora•com>
Reviewed-by: Andy Yan <andy.yan@rock-chips•com>
> ---
> drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
> index 1f5e8c2acecd..0849bd922ffb 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
> @@ -2134,9 +2134,9 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
> {
> struct vop2 *vop2 = vp->vop2;
> struct drm_plane *plane;
> - u32 layer_sel = 0;
> + u32 layer_sel;
> u32 port_sel;
> - u32 atv_layer_sel = 0;
> + u32 atv_layer_sel;
> u8 layer_id;
> u8 old_layer_id;
> u8 layer_sel_id;
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 5/5] drm/rockchip: vop2: Use vop2->old_layer_sel directly in wait_for_layer_cfg_done()
2026-05-04 18:23 [PATCH 0/5] drm/rockchip: vop2: Fix layer cfg done timeout on multi-output setups Cristian Ciocaltea
` (3 preceding siblings ...)
2026-05-04 18:24 ` [PATCH 4/5] drm/rockchip: vop2: Drop redundant zero-init " Cristian Ciocaltea
@ 2026-05-04 18:24 ` Cristian Ciocaltea
2026-06-01 10:54 ` [PATCH 0/5] drm/rockchip: vop2: Fix layer cfg done timeout on multi-output setups Andy Yan
2026-06-02 19:44 ` Heiko Stuebner
6 siblings, 0 replies; 12+ messages in thread
From: Cristian Ciocaltea @ 2026-05-04 18:24 UTC (permalink / raw)
To: Sandy Huang, Heiko Stübner, Andy Yan, Maarten Lankhorst,
Maxime Ripard, Thomas Zimmermann, David Airlie, Simona Vetter
Cc: kernel, dri-devel, linux-arm-kernel, linux-rockchip, linux-kernel
After the old_layer_sel local was removed, the only caller of
rk3568_vop2_wait_for_layer_cfg_done() already passes vop2->old_layer_sel
as the expected value.
Drop the redundant parameter and read the member directly inside the
function.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora•com>
---
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
index 0849bd922ffb..1d8473a6dfd1 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
@@ -2115,7 +2115,7 @@ static u32 rk3568_vop2_read_layer_cfg(struct vop2 *vop2)
return vop2_readl(vop2, RK3568_OVL_LAYER_SEL);
}
-static void rk3568_vop2_wait_for_layer_cfg_done(struct vop2 *vop2, u32 cfg)
+static void rk3568_vop2_wait_for_layer_cfg_done(struct vop2 *vop2)
{
u32 atv_layer_cfg;
int ret;
@@ -2124,10 +2124,10 @@ static void rk3568_vop2_wait_for_layer_cfg_done(struct vop2 *vop2, u32 cfg)
* Spin until the previous layer configuration is done.
*/
ret = readx_poll_timeout_atomic(rk3568_vop2_read_layer_cfg, vop2, atv_layer_cfg,
- atv_layer_cfg == cfg, 10, 50 * 1000);
+ atv_layer_cfg == vop2->old_layer_sel, 10, 50 * 1000);
if (ret)
drm_err_ratelimited(vop2->drm, "wait layer cfg done timeout: 0x%x--0x%x\n",
- atv_layer_cfg, cfg);
+ atv_layer_cfg, vop2->old_layer_sel);
}
static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
@@ -2292,7 +2292,7 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
* Changes of other VPs' overlays have not taken effect
*/
if (cfg_done)
- rk3568_vop2_wait_for_layer_cfg_done(vop2, vop2->old_layer_sel);
+ rk3568_vop2_wait_for_layer_cfg_done(vop2);
}
if (layer_sel != vop2->old_layer_sel || port_sel != vop2->old_port_sel)
--
2.53.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 0/5] drm/rockchip: vop2: Fix layer cfg done timeout on multi-output setups
2026-05-04 18:23 [PATCH 0/5] drm/rockchip: vop2: Fix layer cfg done timeout on multi-output setups Cristian Ciocaltea
` (4 preceding siblings ...)
2026-05-04 18:24 ` [PATCH 5/5] drm/rockchip: vop2: Use vop2->old_layer_sel directly in wait_for_layer_cfg_done() Cristian Ciocaltea
@ 2026-06-01 10:54 ` Andy Yan
2026-06-01 16:48 ` Cristian Ciocaltea
2026-06-02 19:44 ` Heiko Stuebner
6 siblings, 1 reply; 12+ messages in thread
From: Andy Yan @ 2026-06-01 10:54 UTC (permalink / raw)
To: Cristian Ciocaltea, Sandy Huang, Heiko Stübner,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie,
Simona Vetter
Cc: kernel, dri-devel, linux-arm-kernel, linux-rockchip, linux-kernel
Hello Cristian,
On 5/5/26 02:23, Cristian Ciocaltea wrote:
> On RK3588/RK3568 boards with multiple active display outputs, start/stop
> transitions may trigger a timeout during overlay layer configuration:
>
> rockchip-drm display-subsystem: [drm] *ERROR* wait layer cfg done timeout
>
> The shared OVL_LAYER_SEL and OVL_PORT_SEL shadow registers are committed
> to the active configuration at the vsync of whichever Video Port is
> selected by LAYERSEL_REGDONE_SEL. When two Video Ports race through
> atomic commits, rk3568_vop2_setup_layer_mixer() has two issues that
> cause the wait to poll for a value the hardware might not be able to
> produce.
>
> Patch 1 fixes passing the wrong target to the wait function, since the
> expected value was already overwritten with the current VP's new
> layer_sel before reaching the wait.
>
> Patch 2 moves the wait before the LAYERSEL_REGDONE_SEL switch, so the
> previous VP's vsync can still latch the pending configuration.
>
> Patches 3 through 5 contain only minor follow-up cleanup.
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora•com>
Thank you very much for your work, these fixes all look sensible.
However, I haven't been able to construct a scenario via weston that
reproduce these issues. Could you please tell me how you triggered them?
> ---
> Cristian Ciocaltea (5):
> drm/rockchip: vop2: Fix wrong wait target in layer cfg done check
> drm/rockchip: vop2: Wait for layer cfg done before switching LAYERSEL_REGDONE_SEL
> drm/rockchip: vop2: Delay old_{layer|port}_sel updates in setup_layer_mixer()
> drm/rockchip: vop2: Drop redundant zero-init in setup_layer_mixer()
> drm/rockchip: vop2: Use vop2->old_layer_sel directly in wait_for_layer_cfg_done()
>
> drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 46 +++++++++++++---------------
> 1 file changed, 22 insertions(+), 24 deletions(-)
> ---
> base-commit: d4c14903bf5e28e740516c4fbb7db01e0dedf3af
> change-id: 20260504-vop2-layer-cfg-tmout-73617a0a103c
>
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 0/5] drm/rockchip: vop2: Fix layer cfg done timeout on multi-output setups
2026-06-01 10:54 ` [PATCH 0/5] drm/rockchip: vop2: Fix layer cfg done timeout on multi-output setups Andy Yan
@ 2026-06-01 16:48 ` Cristian Ciocaltea
0 siblings, 0 replies; 12+ messages in thread
From: Cristian Ciocaltea @ 2026-06-01 16:48 UTC (permalink / raw)
To: Andy Yan, Sandy Huang, Heiko Stübner, Maarten Lankhorst,
Maxime Ripard, Thomas Zimmermann, David Airlie, Simona Vetter
Cc: kernel, dri-devel, linux-arm-kernel, linux-rockchip, linux-kernel
Hi Andy,
On 6/1/26 1:54 PM, Andy Yan wrote:
> Hello Cristian,
>
> On 5/5/26 02:23, Cristian Ciocaltea wrote:
>> On RK3588/RK3568 boards with multiple active display outputs, start/stop
>> transitions may trigger a timeout during overlay layer configuration:
>>
>> rockchip-drm display-subsystem: [drm] *ERROR* wait layer cfg done timeout
>>
>> The shared OVL_LAYER_SEL and OVL_PORT_SEL shadow registers are committed
>> to the active configuration at the vsync of whichever Video Port is
>> selected by LAYERSEL_REGDONE_SEL. When two Video Ports race through
>> atomic commits, rk3568_vop2_setup_layer_mixer() has two issues that
>> cause the wait to poll for a value the hardware might not be able to
>> produce.
>>
>> Patch 1 fixes passing the wrong target to the wait function, since the
>> expected value was already overwritten with the current VP's new
>> layer_sel before reaching the wait.
>>
>> Patch 2 moves the wait before the LAYERSEL_REGDONE_SEL switch, so the
>> previous VP's vsync can still latch the pending configuration.
>>
>> Patches 3 through 5 contain only minor follow-up cleanup.
>>
>> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora•com>
>
>
> Thank you very much for your work, these fixes all look sensible.
Thanks for checking this out!
> However, I haven't been able to construct a scenario via weston that
> reproduce these issues. Could you please tell me how you triggered them?
It was really tricky to reproduce - a customer usecase repeatedly restarting one
of their apps under a customized Weston, and all that when having both HDMI
output ports active, where at least one drives a 4K display.
Regards,
Cristian
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/5] drm/rockchip: vop2: Fix layer cfg done timeout on multi-output setups
2026-05-04 18:23 [PATCH 0/5] drm/rockchip: vop2: Fix layer cfg done timeout on multi-output setups Cristian Ciocaltea
` (5 preceding siblings ...)
2026-06-01 10:54 ` [PATCH 0/5] drm/rockchip: vop2: Fix layer cfg done timeout on multi-output setups Andy Yan
@ 2026-06-02 19:44 ` Heiko Stuebner
6 siblings, 0 replies; 12+ messages in thread
From: Heiko Stuebner @ 2026-06-02 19:44 UTC (permalink / raw)
To: Sandy Huang, Andy Yan, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Simona Vetter,
Cristian Ciocaltea
Cc: Heiko Stuebner, kernel, dri-devel, linux-arm-kernel,
linux-rockchip, linux-kernel
On Mon, 04 May 2026 21:23:58 +0300, Cristian Ciocaltea wrote:
> On RK3588/RK3568 boards with multiple active display outputs, start/stop
> transitions may trigger a timeout during overlay layer configuration:
>
> rockchip-drm display-subsystem: [drm] *ERROR* wait layer cfg done timeout
>
> The shared OVL_LAYER_SEL and OVL_PORT_SEL shadow registers are committed
> to the active configuration at the vsync of whichever Video Port is
> selected by LAYERSEL_REGDONE_SEL. When two Video Ports race through
> atomic commits, rk3568_vop2_setup_layer_mixer() has two issues that
> cause the wait to poll for a value the hardware might not be able to
> produce.
>
> [...]
Applied, thanks!
[1/5] drm/rockchip: vop2: Fix wrong wait target in layer cfg done check
commit: 9f5670802df085ad343146561e69bac43e9905d2
[2/5] drm/rockchip: vop2: Wait for layer cfg done before switching LAYERSEL_REGDONE_SEL
commit: d1ad644e572c0647ad8428439eafea0aacfccf9e
[3/5] drm/rockchip: vop2: Delay old_{layer|port}_sel updates in setup_layer_mixer()
commit: 6a2f7339191b652f7ff998595df90987b33c3fda
[4/5] drm/rockchip: vop2: Drop redundant zero-init in setup_layer_mixer()
commit: bc5ffd6fc30cc52983d95fbe8783bb4233db6f86
[5/5] drm/rockchip: vop2: Use vop2->old_layer_sel directly in wait_for_layer_cfg_done()
commit: dc3de97433db03157ba6f87b6494ff1ad416a5a8
Best regards,
--
Heiko Stuebner <heiko@sntech•de>
^ permalink raw reply [flat|nested] 12+ messages in thread