From: s.nawrocki@samsung•com (Sylwester Nawrocki)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 4/4] ARM: exynos4: remove useless code to save/restore L2 and GIC state
Date: Fri, 04 Nov 2011 18:33:50 +0100 [thread overview]
Message-ID: <4EB421FE.407@samsung.com> (raw)
In-Reply-To: <1320426228-21746-5-git-send-email-amit.kachhap@linaro.org>
On 11/04/2011 06:03 PM, amit.kachhap at linaro.org wrote:
> From: Amit Daniel Kachhap <amit.kachhap@linaro•org>
>
> Following the merge of CPU PM notifiers and L2 resume code, this patch
> removes useless code to save and restore L2 and GIC registers.
>
> This is now automatically covered by suspend calls which integrated
> CPU PM notifiers and new sleep code that allows to resume L2 before MMU
> is turned on.
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm•com>
> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@linaro•org>
> ---
> arch/arm/mach-exynos4/pm.c | 86 --------------------------------------------
> 1 files changed, 0 insertions(+), 86 deletions(-)
>
> diff --git a/arch/arm/mach-exynos4/pm.c b/arch/arm/mach-exynos4/pm.c
> index 62e4f43..7499f14 100644
> --- a/arch/arm/mach-exynos4/pm.c
> +++ b/arch/arm/mach-exynos4/pm.c
> @@ -63,77 +63,6 @@ static struct sleep_save exynos4_vpll_save[] = {
> };
>
> static struct sleep_save exynos4_core_save[] = {
> - /* GIC side */
> - SAVE_ITEM(S5P_VA_GIC_CPU + 0x000),
> - SAVE_ITEM(S5P_VA_GIC_CPU + 0x004),
> - SAVE_ITEM(S5P_VA_GIC_CPU + 0x008),
> - SAVE_ITEM(S5P_VA_GIC_CPU + 0x00C),
> - SAVE_ITEM(S5P_VA_GIC_CPU + 0x014),
> - SAVE_ITEM(S5P_VA_GIC_CPU + 0x018),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x000),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x004),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x100),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x104),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x108),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x300),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x304),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x308),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x400),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x404),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x408),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x40C),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x410),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x414),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x418),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x41C),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x420),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x424),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x428),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x42C),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x430),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x434),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x438),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x43C),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x440),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x444),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x448),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x44C),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x450),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x454),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x458),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x45C),
> -
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x800),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x804),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x808),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x80C),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x810),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x814),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x818),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x81C),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x820),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x824),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x828),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x82C),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x830),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x834),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x838),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x83C),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x840),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x844),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x848),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x84C),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x850),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x854),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x858),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0x85C),
> -
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0xC00),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0xC04),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0xC08),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0xC0C),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0xC10),
> - SAVE_ITEM(S5P_VA_GIC_DIST + 0xC14),
This list is not complete anyway, some peripheral devices interrupts do not
work after resume from system suspend to RAM.
Is there any code already handling GIC state during system suspend/resume cycles?
Or you refer to some upcoming patches ?
--
Thanks,
Sylwester
next prev parent reply other threads:[~2011-11-04 17:33 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-04 17:03 [PATCH 0/4]ARM: exynos4: Add l2 retention mode cpuidle state amit.kachhap at linaro.org
2011-11-04 17:03 ` [PATCH 1/4] ARM: exynos4: Add support for AFTR " amit.kachhap at linaro.org
2011-11-11 7:33 ` MyungJoo Ham
2011-11-17 11:22 ` Amit Kachhap
2011-11-18 4:07 ` MyungJoo Ham
2011-11-04 17:03 ` [PATCH 2/4] ARM: exynos4: remove useless churn in sleep.S amit.kachhap at linaro.org
2011-11-04 17:03 ` [PATCH 3/4] ARM: exynos4: add L2 early resume code amit.kachhap at linaro.org
2011-11-04 17:03 ` [PATCH 4/4] ARM: exynos4: remove useless code to save/restore L2 and GIC state amit.kachhap at linaro.org
2011-11-04 17:33 ` Sylwester Nawrocki [this message]
2011-11-11 6:28 ` Amit Kachhap
2011-11-11 11:41 ` Sylwester Nawrocki
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