* [RESEND,v2 0/2] MT8189 SMI SUPPORT @ 2026-04-27 7:04 mtk20898 2026-04-27 7:04 ` [RESEND,v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 mtk20898 2026-04-27 7:04 ` [RESEND,v2 2/2] memory: mtk-smi: Add mt8189 support mtk20898 0 siblings, 2 replies; 7+ messages in thread From: mtk20898 @ 2026-04-27 7:04 UTC (permalink / raw) To: Yong Wu, Krzysztof Kozlowski, Rob Herring, Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno Cc: linux-mediatek, linux-kernel, devicetree, linux-arm-kernel, Project_Global_Chrome_Upstream_Group, mtk20898 Based on tag: next-20260424, linux-next/master This patchset add mt8189 smi support. --- Changes in v2: Just modify the mediatek,smi-common.yaml file as follows: - Add schematic diagram explanation between smi-common and smi-sub-common - Change the clock numbers of smi-sub-common to minimum 2, the third clock is optional - Link to v1: https://lore.kernel.org/all/20250919081014.14100-1-zhengnan.chen@mediatek.com/ --- Zhengnan Chen (2): dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 memory: mtk-smi: Add mt8189 support .../mediatek,smi-common.yaml | 25 ++++++++++- .../memory-controllers/mediatek,smi-larb.yaml | 3 ++ drivers/memory/mtk-smi.c | 44 +++++++++++++++++++ 3 files changed, 70 insertions(+), 2 deletions(-) -- 2.46.0 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [RESEND,v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 2026-04-27 7:04 [RESEND,v2 0/2] MT8189 SMI SUPPORT mtk20898 @ 2026-04-27 7:04 ` mtk20898 2026-04-28 6:26 ` Krzysztof Kozlowski 2026-05-24 19:08 ` Krzysztof Kozlowski 2026-04-27 7:04 ` [RESEND,v2 2/2] memory: mtk-smi: Add mt8189 support mtk20898 1 sibling, 2 replies; 7+ messages in thread From: mtk20898 @ 2026-04-27 7:04 UTC (permalink / raw) To: Yong Wu, Krzysztof Kozlowski, Rob Herring, Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno Cc: linux-mediatek, linux-kernel, devicetree, linux-arm-kernel, Project_Global_Chrome_Upstream_Group, Zhengnan Chen From: Zhengnan Chen <zhengnan.chen@mediatek•com> Add binding description for mt8189. The clocks number of mt8189 smi-sub common has a bit difference. Its clock count is 2, while mt8195 has 3. Therefore, the minimum number of clocks is changed to 2, with the third one being optional. About what smi-sub-common is, please check the below diagram, we add it in mediatek,smi-common.yaml file. Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek•com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora•com> --- .../mediatek,smi-common.yaml | 25 +++++++++++++++++-- .../memory-controllers/mediatek,smi-larb.yaml | 3 +++ 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml index 0762e0ff66ef..454d11a83973 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml @@ -25,6 +25,21 @@ description: | SMI generation 1 to transform the smi clock into emi clock domain, but that is not needed for SMI generation 2. + The smi-common connects with smi-larb and IOMMU. The maximum inputs number of + a smi-common is 8. In SMI generation 2, the engines number may be over 8. + In this case, we use a smi-sub-common to merge some larbs. + The block diagram something is like: + + IOMMU + | | + smi-common + --------------------------- + | | ... + larb0 sub-common ... <-max number is 8 + ---------------- + | | ... + larb1 larbX ... <-max number is 8 + properties: compatible: oneOf: @@ -40,6 +55,8 @@ properties: - mediatek,mt8186-smi-common - mediatek,mt8188-smi-common-vdo - mediatek,mt8188-smi-common-vpp + - mediatek,mt8189-smi-common + - mediatek,mt8189-smi-sub-common - mediatek,mt8192-smi-common - mediatek,mt8195-smi-common-vdo - mediatek,mt8195-smi-common-vpp @@ -108,19 +125,23 @@ allOf: compatible: contains: enum: + - mediatek,mt8189-smi-sub-common - mediatek,mt8195-smi-sub-common then: required: - mediatek,smi properties: clocks: - minItems: 3 + minItems: 2 maxItems: 3 clock-names: + minItems: 2 + maxItems: 3 items: - const: apb - const: smi - - const: gals0 + additionalItems: + const: gals0 else: properties: mediatek,smi: false diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml index 2e7fac4b5094..9a5dafd7c07e 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml @@ -27,6 +27,7 @@ properties: - mediatek,mt8183-smi-larb - mediatek,mt8186-smi-larb - mediatek,mt8188-smi-larb + - mediatek,mt8189-smi-larb - mediatek,mt8192-smi-larb - mediatek,mt8195-smi-larb @@ -85,6 +86,7 @@ allOf: - mediatek,mt8183-smi-larb - mediatek,mt8186-smi-larb - mediatek,mt8188-smi-larb + - mediatek,mt8189-smi-larb - mediatek,mt8195-smi-larb then: @@ -119,6 +121,7 @@ allOf: - mediatek,mt6779-smi-larb - mediatek,mt8186-smi-larb - mediatek,mt8188-smi-larb + - mediatek,mt8189-smi-larb - mediatek,mt8192-smi-larb - mediatek,mt8195-smi-larb -- 2.46.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [RESEND,v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 2026-04-27 7:04 ` [RESEND,v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 mtk20898 @ 2026-04-28 6:26 ` Krzysztof Kozlowski 2026-04-30 7:22 ` Zhengnan Chen (陈征南) 2026-05-24 19:08 ` Krzysztof Kozlowski 1 sibling, 1 reply; 7+ messages in thread From: Krzysztof Kozlowski @ 2026-04-28 6:26 UTC (permalink / raw) To: mtk20898 Cc: Yong Wu, Rob Herring, Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno, linux-mediatek, linux-kernel, devicetree, linux-arm-kernel, Project_Global_Chrome_Upstream_Group On Mon, Apr 27, 2026 at 03:04:28PM +0800, mtk20898 wrote: > properties: > compatible: > oneOf: > @@ -40,6 +55,8 @@ properties: > - mediatek,mt8186-smi-common > - mediatek,mt8188-smi-common-vdo > - mediatek,mt8188-smi-common-vpp > + - mediatek,mt8189-smi-common > + - mediatek,mt8189-smi-sub-common > - mediatek,mt8192-smi-common > - mediatek,mt8195-smi-common-vdo > - mediatek,mt8195-smi-common-vpp > @@ -108,19 +125,23 @@ allOf: > compatible: > contains: > enum: > + - mediatek,mt8189-smi-sub-common > - mediatek,mt8195-smi-sub-common > then: > required: > - mediatek,smi > properties: > clocks: > - minItems: 3 > + minItems: 2 Same problem as v2 before resend. Please explain me how mt8195 requires three clocks. You can prove it by trying a malformed DTS (past here the snippet/diff) and pasting here the validation error. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [RESEND,v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 2026-04-28 6:26 ` Krzysztof Kozlowski @ 2026-04-30 7:22 ` Zhengnan Chen (陈征南) 0 siblings, 0 replies; 7+ messages in thread From: Zhengnan Chen (陈征南) @ 2026-04-30 7:22 UTC (permalink / raw) To: krzk@kernel•org Cc: linux-mediatek@lists•infradead.org, linux-kernel@vger•kernel.org, devicetree@vger•kernel.org, Yong Wu (吴勇), conor+dt@kernel•org, robh@kernel•org, Project_Global_Chrome_Upstream_Group, linux-arm-kernel@lists•infradead.org, matthias.bgg@gmail•com, AngeloGioacchino Del Regno On Tue, 2026-04-28 at 08:26 +0200, Krzysztof Kozlowski wrote: > On Mon, Apr 27, 2026 at 03:04:28PM +0800, mtk20898 wrote: > > properties: > > compatible: > > oneOf: > > @@ -40,6 +55,8 @@ properties: > > - mediatek,mt8186-smi-common > > - mediatek,mt8188-smi-common-vdo > > - mediatek,mt8188-smi-common-vpp > > + - mediatek,mt8189-smi-common > > + - mediatek,mt8189-smi-sub-common > > - mediatek,mt8192-smi-common > > - mediatek,mt8195-smi-common-vdo > > - mediatek,mt8195-smi-common-vpp > > @@ -108,19 +125,23 @@ allOf: > > compatible: > > contains: > > enum: > > + - mediatek,mt8189-smi-sub-common > > - mediatek,mt8195-smi-sub-common > > then: > > required: > > - mediatek,smi > > properties: > > clocks: > > - minItems: 3 > > + minItems: 2 > > Same problem as v2 before resend. > > Please explain me how mt8195 requires three clocks. You can prove it > by > trying a malformed DTS (past here the snippet/diff) and pasting here > the > validation error. > > > Best regards, > Krzysztof > The mt8195 smi-sub-comm has a three-clock configuration, for example: smi_sub_common_cam_7x1: smi@16005000 { compatible = "mediatek,mt8195-smi-sub-common"; reg = <0 0x16005000 0 0x1000>; clocks = <&camsys CLK_CAM_LARB14>, <&camsys CLK_CAM_CAM2MM1_GALS>, <&vppsys0 CLK_VPP0_GALS_IMGSYS_CAMSYS>; clock-names = "apb", "smi", "gals0"; mediatek,smi = <&smi_common_vpp>; power-domains = <&spm MT8195_POWER_DOMAIN_CAM>; }; but mt8189 smi-sub-comm only requires 2 clock cycles, there is no case where three clock cycles are needed, for example: smi_cam_3x1_sub_comm: smi@1a00c000 { compatible = "mediatek,mt8189-smi-sub-common"; reg = <0 0x1a00c000 0 0x1000>; clocks = <&camsys_main_clk CLK_CAM_M_CAM2MM_GALS>, <&camsys_main_clk CLK_CAM_M_CAM2MM_GALS>; clock-names = "apb", "smi"; power-domains = <&spm MT8189_POWER_DOMAIN_CAM_MAIN>; mediatek,smi = <&smi_disp_common>; }; Our current approach is rather lenient. If stricter restrictions are needed, it should be revised. We want to change it to a format similar to the following: allOf: # Generic rule: only sub-common nodes can have mediatek,smi - if: properties: compatible: contains: pattern: "^mediatek,mt[0-9]+-smi-sub-common$" then: required: - mediatek,smi else: properties: mediatek,smi: false # Group A: sub-common SoCs with exactly 2 clocks - if: properties: compatible: contains: enum: - mediatek,mt8189-smi-sub-common then: properties: clocks: minItems: 2 maxItems: 2 clock-names: minItems: 2 maxItems: 2 items: - const: apb - const: smi # Group B: sub-common SoCs with exactly 3 clocks - if: properties: compatible: contains: enum: - mediatek,mt8195-smi-sub-common then: properties: clocks: minItems: 3 maxItems: 3 clock-names: minItems: 3 maxItems: 3 items: - const: apb - const: smi - const: gals0 Is this writing okay? ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [RESEND,v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 2026-04-27 7:04 ` [RESEND,v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 mtk20898 2026-04-28 6:26 ` Krzysztof Kozlowski @ 2026-05-24 19:08 ` Krzysztof Kozlowski 1 sibling, 0 replies; 7+ messages in thread From: Krzysztof Kozlowski @ 2026-05-24 19:08 UTC (permalink / raw) To: mtk20898, Yong Wu, Rob Herring, Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno Cc: linux-mediatek, linux-kernel, devicetree, linux-arm-kernel, Project_Global_Chrome_Upstream_Group On 27/04/2026 09:04, mtk20898 wrote: > From: Zhengnan Chen <zhengnan.chen@mediatek•com> > > Add binding description for mt8189. > > The clocks number of mt8189 smi-sub common has a bit difference. > Its clock count is 2, while mt8195 has 3. Therefore, the minimum > number of clocks is changed to 2, with the third one being optional. Then why does the binding say that mt8195 has two clocks? You already received exactly this question. > > About what smi-sub-common is, please check the below diagram, > we add it in mediatek,smi-common.yaml file. > > Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek•com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora•com> No need to resend this. You received comments at v2 and you should have implemented them. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 7+ messages in thread
* [RESEND,v2 2/2] memory: mtk-smi: Add mt8189 support 2026-04-27 7:04 [RESEND,v2 0/2] MT8189 SMI SUPPORT mtk20898 2026-04-27 7:04 ` [RESEND,v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 mtk20898 @ 2026-04-27 7:04 ` mtk20898 2026-05-09 8:00 ` Yong Wu (吴勇) 1 sibling, 1 reply; 7+ messages in thread From: mtk20898 @ 2026-04-27 7:04 UTC (permalink / raw) To: Yong Wu, Krzysztof Kozlowski, Rob Herring, Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno Cc: linux-mediatek, linux-kernel, devicetree, linux-arm-kernel, Project_Global_Chrome_Upstream_Group, Zhengnan Chen From: Zhengnan Chen <zhengnan.chen@mediatek•com> Add the necessary platform data and ostdl setting to enable support for mt8189 smi. Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek•com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora•com> --- drivers/memory/mtk-smi.c | 44 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index aaeba8ab211e..f2d5462af681 100644 --- a/drivers/memory/mtk-smi.c +++ b/drivers/memory/mtk-smi.c @@ -401,6 +401,30 @@ static const u8 mtk_smi_larb_mt8188_ostd[][SMI_LARB_PORT_NR_MAX] = { [25] = {0x01}, }; +static const u8 mtk_smi_larb_mt8189_ostd[][SMI_LARB_PORT_NR_MAX] = { + [0] = {0x8, 0x20, 0x20, 0x20, 0x20, 0x20, 0x10, 0x0,}, + [1] = {0x8, 0x20, 0x20, 0x20, 0x20, 0x20, 0x10, 0x0,}, + [2] = {0x7, 0x7, 0x4, 0x4, 0x0, 0x0, 0x2, 0x2, 0x7, 0x7, 0x0,}, + [4] = {0x2F, 0x1E, 0x9, 0x1, 0x1, 0x1, 0x1, 0x2, 0x2, 0x5, 0x1, 0x17,}, + [7] = {0x20, 0x2, 0x1, 0x1, 0x1, 0x4, 0x2, 0x1, 0x1, 0x2, 0x3, 0x2, + 0xA, 0xF, 0x4, 0x6, 0x5, 0x1,}, + [9] = {0x6, 0x3, 0xC, 0x6, 0x1, 0x4, 0x3, 0x1, 0x2, 0x4, 0x5, 0x2, + 0x4, 0x2, 0x3, 0xB, 0x1, 0x4, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, + 0x1, 0x1,}, + [11] = {0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, + 0x1, 0x1, 0x1, 0xB, 0x1, 0x4, 0x6, 0x5, 0x6, 0x1, 0x5, 0x2, + 0x9, 0x5,}, + [13] = {0x2, 0x8, 0x8, 0x8, 0x4, 0x4, 0x4, 0x4, 0x4, 0xE, 0x4, 0x1, + 0x6, 0x6, 0x2,}, + [14] = {0x1, 0x1, 0x1, 0x20, 0xE, 0x4, 0x8, 0x8, 0x6, 0x4,}, + [16] = {0x1E, 0xC, 0x2, 0x8, 0xE, 0x2, 0x1E, 0x10, 0x4, 0x2, 0x2, 0x2, + 0x2, 0x2, 0x4, 0x2, 0x4,}, + [17] = {0x1E, 0xC, 0x2, 0x8, 0xE, 0x2, 0x1E, 0x10, 0x4, 0x2, 0x2, 0x2, + 0x2, 0x2, 0x4, 0x2, 0x4,}, + [19] = {0x2, 0x1, 0x3, 0x1,}, + [20] = {0x7, 0x7, 0x3, 0x3, 0x1, 0x1,}, +}; + static const u8 mtk_smi_larb_mt8192_ostd[][SMI_LARB_PORT_NR_MAX] = { [0] = {0x2, 0x2, 0x28, 0xa, 0xc, 0x28,}, [1] = {0x2, 0x2, 0x18, 0x18, 0x18, 0xa, 0xc, 0x28,}, @@ -533,6 +557,13 @@ static const struct mtk_smi_larb_gen mtk_smi_larb_mt8188 = { .ostd = mtk_smi_larb_mt8188_ostd, }; +static const struct mtk_smi_larb_gen mtk_smi_larb_mt8189 = { + .config_port = mtk_smi_larb_config_port_gen2_general, + .flags_general = MTK_SMI_FLAG_THRT_UPDATE | MTK_SMI_FLAG_SW_FLAG | + MTK_SMI_FLAG_SLEEP_CTL | MTK_SMI_FLAG_CFG_PORT_SEC_CTL, + .ostd = mtk_smi_larb_mt8189_ostd, +}; + static const struct mtk_smi_larb_gen mtk_smi_larb_mt8192 = { .config_port = mtk_smi_larb_config_port_gen2_general, .ostd = mtk_smi_larb_mt8192_ostd, @@ -556,6 +587,7 @@ static const struct of_device_id mtk_smi_larb_of_ids[] = { {.compatible = "mediatek,mt8183-smi-larb", .data = &mtk_smi_larb_mt8183}, {.compatible = "mediatek,mt8186-smi-larb", .data = &mtk_smi_larb_mt8186}, {.compatible = "mediatek,mt8188-smi-larb", .data = &mtk_smi_larb_mt8188}, + {.compatible = "mediatek,mt8189-smi-larb", .data = &mtk_smi_larb_mt8189}, {.compatible = "mediatek,mt8192-smi-larb", .data = &mtk_smi_larb_mt8192}, {.compatible = "mediatek,mt8195-smi-larb", .data = &mtk_smi_larb_mt8195}, {} @@ -808,6 +840,16 @@ static const struct mtk_smi_common_plat mtk_smi_common_mt8188_vpp = { .init = mtk_smi_common_mt8195_init, }; +static const struct mtk_smi_common_plat mtk_smi_common_mt8189 = { + .type = MTK_SMI_GEN2, + .bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(3) | F_MMU1_LARB(5) | + F_MMU1_LARB(7), +}; + +static const struct mtk_smi_common_plat mtk_smi_sub_common_mt8189 = { + .type = MTK_SMI_GEN2_SUB_COMM, +}; + static const struct mtk_smi_common_plat mtk_smi_common_mt8192 = { .type = MTK_SMI_GEN2, .has_gals = true, @@ -852,6 +894,8 @@ static const struct of_device_id mtk_smi_common_of_ids[] = { {.compatible = "mediatek,mt8186-smi-common", .data = &mtk_smi_common_mt8186}, {.compatible = "mediatek,mt8188-smi-common-vdo", .data = &mtk_smi_common_mt8188_vdo}, {.compatible = "mediatek,mt8188-smi-common-vpp", .data = &mtk_smi_common_mt8188_vpp}, + {.compatible = "mediatek,mt8189-smi-common", .data = &mtk_smi_common_mt8189}, + {.compatible = "mediatek,mt8189-smi-sub-common", .data = &mtk_smi_sub_common_mt8189}, {.compatible = "mediatek,mt8192-smi-common", .data = &mtk_smi_common_mt8192}, {.compatible = "mediatek,mt8195-smi-common-vdo", .data = &mtk_smi_common_mt8195_vdo}, {.compatible = "mediatek,mt8195-smi-common-vpp", .data = &mtk_smi_common_mt8195_vpp}, -- 2.46.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [RESEND,v2 2/2] memory: mtk-smi: Add mt8189 support 2026-04-27 7:04 ` [RESEND,v2 2/2] memory: mtk-smi: Add mt8189 support mtk20898 @ 2026-05-09 8:00 ` Yong Wu (吴勇) 0 siblings, 0 replies; 7+ messages in thread From: Yong Wu (吴勇) @ 2026-05-09 8:00 UTC (permalink / raw) To: robh@kernel•org, matthias.bgg@gmail•com, conor+dt@kernel•org, Zhengnan Chen (陈征南), krzk@kernel•org, AngeloGioacchino Del Regno Cc: linux-arm-kernel@lists•infradead.org, linux-kernel@vger•kernel.org, linux-mediatek@lists•infradead.org, devicetree@vger•kernel.org, Project_Global_Chrome_Upstream_Group On Mon, 2026-04-27 at 15:04 +0800, mtk20898 wrote: > From: Zhengnan Chen <zhengnan.chen@mediatek•com> > > Add the necessary platform data and ostdl setting to enable support > for mt8189 smi. > > Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek•com> > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora•com> > --- > drivers/memory/mtk-smi.c | 44 > ++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 44 insertions(+) Reviewed-by: Yong Wu <yong.wu@mediatek•com> ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2026-05-24 19:08 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-04-27 7:04 [RESEND,v2 0/2] MT8189 SMI SUPPORT mtk20898 2026-04-27 7:04 ` [RESEND,v2 1/2] dt-bindings: memory-controllers: mtk-smi: Add support for mt8189 mtk20898 2026-04-28 6:26 ` Krzysztof Kozlowski 2026-04-30 7:22 ` Zhengnan Chen (陈征南) 2026-05-24 19:08 ` Krzysztof Kozlowski 2026-04-27 7:04 ` [RESEND,v2 2/2] memory: mtk-smi: Add mt8189 support mtk20898 2026-05-09 8:00 ` Yong Wu (吴勇)
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