From: swarren@wwwdotorg•org (Stephen Warren)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 1/5] clk: tegra: Correct sbc mux width & parent
Date: Wed, 07 Aug 2013 10:56:02 -0600 [thread overview]
Message-ID: <52027C22.9080707@wwwdotorg.org> (raw)
In-Reply-To: <1375874709-10438-1-git-send-email-markz@nvidia.com>
On 08/07/2013 05:25 AM, Mark Zhang wrote:
> T114 sbc1-sbc6 have more possible parent clocks than t30.
> So correct the parents and mux width for them.
s/T114/Tegra114/ s/t30/Tegra30/
> diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
> - TEGRA_INIT_DATA_MUX("sbc1", NULL, "tegra11-spi.0", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SBC1, 41, &periph_h_regs, TEGRA_PERIPH_ON_APB, sbc1),
...
> + TEGRA_INIT_DATA_MUX8("sbc1", NULL, "tegra11-spi.0", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SBC1, 41, &periph_h_regs, TEGRA_PERIPH_ON_APB, sbc1),
This isn't a comment on this patch, but sometime later, can we remove
those device names from these entries? They're wrong on many different
levels, and shouldn't be required now that all our devices get clocks
from DT.
next prev parent reply other threads:[~2013-08-07 16:56 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-07 11:25 [PATCH 1/5] clk: tegra: Correct sbc mux width & parent Mark Zhang
2013-08-07 11:25 ` [PATCH 2/5] clk: tegra: Add reset only clock node flag and COP Mark Zhang
2013-08-07 16:58 ` Stephen Warren
2013-08-08 5:50 ` Mark Zhang
2013-08-19 14:53 ` Peter De Schrijver
2013-08-19 16:25 ` Stephen Warren
2013-08-07 11:25 ` [PATCH 3/5] clk: tegra: Fix vde/2d/3d clock src offset Mark Zhang
2013-08-07 17:00 ` Stephen Warren
2013-08-20 8:47 ` Peter De Schrijver
2013-08-07 11:25 ` [PATCH 4/5] clk: tegra: Set the clock parent of gr2d/gr3d to pll_c2 Mark Zhang
2013-08-20 8:47 ` Peter De Schrijver
2013-08-07 11:25 ` [PATCH 5/5] clk: tegra: Set the clk parent of host1x to pll_p Mark Zhang
2013-08-07 16:56 ` Stephen Warren [this message]
2013-08-08 1:26 ` [PATCH 1/5] clk: tegra: Correct sbc mux width & parent Mark Zhang
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