From: gregory.clement@free-electrons•com (Gregory CLEMENT)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v2 00/12] CPU idle for Armada XP
Date: Wed, 02 Oct 2013 20:44:57 +0300 [thread overview]
Message-ID: <524C5B99.4080802@free-electrons.com> (raw)
In-Reply-To: <20131002173911.GP31178@titan.lakedaemon.net>
Jason,
On 02/10/2013 20:39, Jason Cooper wrote:
> Gregory,
>
> On Fri, Sep 13, 2013 at 12:06:29PM +0200, Gregory CLEMENT wrote:
>> Hello,
>>
>> This patch set adds the CPU idle support for Armada XP and prepares
>> the support for Armada 370. This was based on the work of Nadav
>> Haklai.
>>
>> Most of the patches modify the mvebu code in order to prepare the
>> support for CPU idle, hence the patches 2 to 10 should go to mvebu
>> subsystem (and then arm-soc).
>>
>> The first patch should go through ARM subsystem and should be taken
>> by Russell King.
>>
>> The 11th patch 'cpuidle: mvebu: Add initial cpu idle support for
>> Armada 370/XP SoC' is the only one who should go to the cpuidle
>> subsystem. But of course I would like that Daniel Lezcano or Rafael
>> J. Wysocki have a look on the whole series.
>>
>> The last patch should also go to mvebu subsystem (and then arm-soc)
>> but with an Acked-by from on of the device tree maintainer.
>>
>> The whole series is also available in the branch CPU-idle-ArmadaXP-v2
>> at https://github.com/MISL-EBU-System-SW/mainline-public.git
>>
>> Thanks,
>>
>> Changelog:
>>
>> v1 -> v2:
>>
>> * Removed the pm_level kernel parameter. As Kevin Hilman pointed, its
>> usage can be replaced by using
>> /sys/devices/system/cpu/cpu*/cpuidle/state*/disable or the kernel
>> parameter cpuidle.off.
>>
>> * Used BIT() macro (reported by Ezequiel)
>>
>> * Made the function more readable the
>> armada_370_xp_pmsu_idle_prepare() function (reported by Thomas)
>>
>> * Moved the config entry in Kconfig.arm, and rename the config symbol
>> according the pattern used by other arm cpu: ARM_"soc name"_CPUIDLE
>>
>> * Moved the build rule under the new ARM SoC section in the Makefile
>>
>> * Rebased on Linus Torvalds master branch of Thursday September 12
>>
>> Gregory CLEMENT (12):
>> ARM: PJ4B: Add cpu_suspend/cpu_resume hooks for PJ4B
>> ARM: mvebu: ll_set_cpu_coherent no more uses the coherency address as
>> parameter
>> ARM: mvebu: ll_set_cpu_coherent always uses the current CPU
>> ARM: mvebu: Remove the unused argument of set_cpu_coherent()
>> ARM: mvebu: Make ll_set_cpu_coherent() more configurable
>> ARM: mvebu: Low level functions to disable cache snooping
>> ARM: mvebu: Add a new set of registers for pmsu
>> ARM: mvebu: Allow to power down L2 cache controller in idle mode
>> ARM: mvebu: Add the PMSU related part of the cpu idle functions
>> ARM: mvebu: Set the start address of a CPU in a separate function
>> cpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC
>> ARM: dts: mvebu: Add a new set of registers to the PMSU node
>
> Is a v3 of this series on it's way?
Yes I got some feedback from the Marvell engineers about the tricky part.
However I am quite busy this week, I am not sure to be able to sent it
before Monday.
Regards,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
next prev parent reply other threads:[~2013-10-02 17:44 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-13 10:06 [PATCH v2 00/12] CPU idle for Armada XP Gregory CLEMENT
2013-09-13 10:06 ` [PATCH v2 01/12] ARM: PJ4B: Add cpu_suspend/cpu_resume hooks for PJ4B Gregory CLEMENT
2013-09-13 10:06 ` [PATCH v2 02/12] ARM: mvebu: ll_set_cpu_coherent no more uses the coherency address as parameter Gregory CLEMENT
2013-09-13 10:06 ` [PATCH v2 03/12] ARM: mvebu: ll_set_cpu_coherent always uses the current CPU Gregory CLEMENT
2013-09-13 10:06 ` [PATCH v2 04/12] ARM: mvebu: Remove the unused argument of set_cpu_coherent() Gregory CLEMENT
2013-09-13 10:06 ` [PATCH v2 05/12] ARM: mvebu: Make ll_set_cpu_coherent() more configurable Gregory CLEMENT
2013-09-13 10:06 ` [PATCH v2 06/12] ARM: mvebu: Low level functions to disable cache snooping Gregory CLEMENT
2013-09-13 10:06 ` [PATCH v2 07/12] ARM: mvebu: Add a new set of registers for pmsu Gregory CLEMENT
2013-09-13 10:06 ` [PATCH v2 08/12] ARM: mvebu: Allow to power down L2 cache controller in idle mode Gregory CLEMENT
2013-09-13 10:06 ` [PATCH v2 09/12] ARM: mvebu: Add the PMSU related part of the cpu idle functions Gregory CLEMENT
2013-09-13 10:06 ` [PATCH v2 10/12] ARM: mvebu: Set the start address of a CPU in a separate function Gregory CLEMENT
2013-09-13 10:06 ` [PATCH v2 11/12] cpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC Gregory CLEMENT
2013-09-13 15:36 ` Daniel Lezcano
2013-09-15 14:34 ` Gregory CLEMENT
2013-09-15 17:31 ` Daniel Lezcano
2013-10-14 14:01 ` Gregory CLEMENT
2013-09-13 16:16 ` Lorenzo Pieralisi
2013-10-14 14:14 ` Gregory CLEMENT
2013-10-14 15:06 ` Lorenzo Pieralisi
2013-09-13 10:06 ` [PATCH v2 12/12] ARM: dts: mvebu: Add a new set of registers to the PMSU node Gregory CLEMENT
2013-09-13 11:00 ` [PATCH v2 00/12] CPU idle for Armada XP Andrew Lunn
2013-09-13 11:17 ` Gregory CLEMENT
2013-09-13 11:38 ` Andrew Lunn
2013-09-13 14:48 ` Kevin Hilman
2013-09-13 15:19 ` Daniel Lezcano
2013-10-02 17:39 ` Jason Cooper
2013-10-02 17:44 ` Gregory CLEMENT [this message]
2013-10-02 17:58 ` Jason Cooper
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