From: Sudeep.KarkadaNagesha@arm•com (Sudeep KarkadaNagesha)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 2/7] arm: dt: zynq: Add 'cpus' node
Date: Mon, 11 Nov 2013 18:57:44 +0000 [thread overview]
Message-ID: <528128A8.9060400@arm.com> (raw)
In-Reply-To: <1383945677-29674-3-git-send-email-soren.brinkmann@xilinx.com>
On 08/11/13 21:21, Soren Brinkmann wrote:
> Add a 'cpus' node to describe the CPU cores of Zynq.
>
> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx•com>
> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx•com>
> ---
> arch/arm/boot/dts/zynq-7000.dtsi | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
> index 27ebc1ba9671..37fc04525142 100644
> --- a/arch/arm/boot/dts/zynq-7000.dtsi
> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
> @@ -15,6 +15,33 @@
> / {
> compatible = "xlnx,zynq-7000";
>
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu at 0 {
> + compatible = "arm,cortex-a9";
> + device_type = "cpu";
> + reg = <0>;
> + clocks = <&clkc 3>;
> + i-cache-size = <0x8000>;
> + i-cache-line-size = <0x20>;
> + d-cache-size = <0x8000>;
> + d-cache-line-size = <0x20>;
These cache properties can be identified through CCSIDR(Cache Size ID Registers)
on ARMv7 Cortex implementations. It's better not to have these in DT if they can
be identified runtime.
Regards,
Sudeep
next prev parent reply other threads:[~2013-11-11 18:57 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-08 21:21 [PATCH 0/7] arm: zynq: cpufreq support Soren Brinkmann
2013-11-08 21:21 ` [PATCH 1/7] arm: dt: zynq: Remove 'clock-ranges' from TTC nodes Soren Brinkmann
2013-11-12 15:29 ` Daniel Lezcano
2013-11-08 21:21 ` [PATCH 2/7] arm: dt: zynq: Add 'cpus' node Soren Brinkmann
2013-11-11 18:57 ` Sudeep KarkadaNagesha [this message]
2013-11-12 18:06 ` Sören Brinkmann
2013-11-12 21:58 ` Sören Brinkmann
2013-11-13 9:54 ` Sudeep KarkadaNagesha
2013-11-08 21:21 ` [PATCH 3/7] clocksource/cadence_ttc: Store timer frequency in driver data Soren Brinkmann
2013-11-12 16:26 ` Daniel Lezcano
2013-11-08 21:21 ` [PATCH 4/7] clocksource/cadence_ttc: Adjust interval in clock notifier Soren Brinkmann
2013-11-12 16:29 ` Daniel Lezcano
2013-11-22 18:06 ` Sören Brinkmann
2013-11-08 21:21 ` [PATCH 5/7] clocksource/cadence_ttc: Overhaul clocksource frequency adjustment Soren Brinkmann
2013-11-12 19:01 ` Daniel Lezcano
2013-11-12 21:13 ` Sören Brinkmann
2013-11-13 8:03 ` Viresh Kumar
2013-11-13 10:29 ` Daniel Lezcano
2013-11-13 17:14 ` Sören Brinkmann
2013-11-23 1:30 ` Sören Brinkmann
2013-11-08 21:21 ` [PATCH 6/7] clocksource/cadence_ttc: Use only one counter Soren Brinkmann
2013-11-08 21:21 ` [PATCH 7/7] arm: zynq: Add support for cpufreq Soren Brinkmann
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