From: nicolas.ferre@atmel•com (Nicolas Ferre)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v4 3/8] at91: dt: Add at91sam9261 dt SoC support
Date: Thu, 13 Feb 2014 09:10:54 +0100 [thread overview]
Message-ID: <52FC7E0E.2010503@atmel.com> (raw)
In-Reply-To: <CACh+v5MgYB+L6vpektjAE1yTH=dvjnyP1CjJeA7vG_yOyxFkgg@mail.gmail.com>
On 12/02/2014 20:47, Jean-Jacques Hiblot :
> Hi Alexandre,
>
> 2014-02-12 18:28 GMT+01:00 Alexandre Belloni
> <alexandre.belloni@free-electrons•com>:
>> Hi,
>>
>> On 12/02/2014 at 11:06:42 +0100, Jean-Jacques Hiblot wrote :
>>> This patch adds support for the Device Tree on a sam9261-based platform
>>>
>>> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler•com>
>>> ---
>>> arch/arm/boot/dts/at91sam9261.dtsi | 740 +++++++++++++++++++++++++++++++++++++
>>> arch/arm/mach-at91/at91sam9261.c | 17 +
>>> 2 files changed, 757 insertions(+)
>>> create mode 100644 arch/arm/boot/dts/at91sam9261.dtsi
>>
>> [...]
>>
>>> +
>>> + apb {
>>> + compatible = "simple-bus";
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + ranges;
>>> +
>>> + tcb0: timer at fffa0000 {
>>> + compatible = "atmel,at91rm9200-tcb";
>>> + reg = <0xfffa0000 0x100>;
>>> + interrupts = < 17 IRQ_TYPE_LEVEL_HIGH 0
>>> + 18 IRQ_TYPE_LEVEL_HIGH 0
>>> + 19 IRQ_TYPE_LEVEL_HIGH 0
>>> + >;
>>> + clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
>>> + clock-names = "t0_clk", "t1_clk", "t2_clk";
>>> + };
>>> +
>>> + usb1: gadget at fffa4000 {
>>> + compatible = "atmel,at91rm9200-udc";
>>> + reg = <0xfffa4000 0x4000>;
>>> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
>>> + clocks = <&usb>, <&udc_clk>, <&udpck>;
>>> + clock-names = "usb_clk", "udc_clk", "udpck";
>>> + status = "disabled";
>>> + };
>>> +
>>> + mmc0: mmc at fffa8000 {
>>> + compatible = "atmel,hsmci";
>>> + reg = <0xfffa8000 0x600>;
>>> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + clocks = <&mci0_clk>;
>>> + clock-names = "mci_clk";
>>> + status = "disabled";
>>> + };
>>> +
>>> + i2c0: i2c at fffac000 {
>>> + compatible = "atmel,at91sam9261-i2c";
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_i2c_twi>;
>>> + reg = <0xfffac000 0x100>;
>>> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + clocks = <&twi0_clk>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + usart0: serial at fffb0000 {
>>> + compatible = "atmel,at91sam9260-usart";
>>> + reg = <0xfffb0000 0x200>;
>>> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + atmel,use-dma-rx;
>>> + atmel,use-dma-tx;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usart0>;
>>> + clocks = <&usart0_clk>;
>>> + clock-names = "usart";
>>> + status = "disabled";
>>> + };
>>> +
>>> + usart1: serial at fffb4000 {
>>> + compatible = "atmel,at91sam9260-usart";
>>> + reg = <0xfffb4000 0x200>;
>>> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + atmel,use-dma-rx;
>>> + atmel,use-dma-tx;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usart1>;
>>> + clocks = <&usart1_clk>;
>>> + clock-names = "usart";
>>> + status = "disabled";
>>> + };
>>> +
>>> + usart2: serial at fffb8000{
>>> + compatible = "atmel,at91sam9260-usart";
>>> + reg = <0xfffb8000 0x200>;
>>> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + atmel,use-dma-rx;
>>> + atmel,use-dma-tx;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usart2>;
>>> + clocks = <&usart2_clk>;
>>> + clock-names = "usart";
>>> + status = "disabled";
>>> + };
>>> +
>>> + ssc0: ssc at fffbc000 {
>>> + compatible = "atmel,at91rm9200-ssc";
>>> + reg = <0xfffbc000 0x4000>;
>>> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + ssc1: ssc at fffc0000 {
>>> + compatible = "atmel,at91rm9200-ssc";
>>> + reg = <0xfffc0000 0x4000>;
>>> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + spi0: spi at fffc8000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91rm9200-spi";
>>> + reg = <0xfffc8000 0x200>;
>>> + cs-gpios = <0>, <0>, <0>, <0>;
>>> + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_spi0>;
>>> + clocks = <&spi0_clk>;
>>> + clock-names = "spi_clk";
>>> + status = "disabled";
>>> + };
>>> +
>>> + spi1: spi at fffcc000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91rm9200-spi";
>>> + reg = <0xfffcc000 0x200>;
>>> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_spi1>;
>>> + clocks = <&spi1_clk>;
>>> + clock-names = "spi_clk";
>>> + status = "disabled";
>>> + };
>>> +
>>> + ramc: ramc at ffffea00 {
>>> + compatible = "atmel,at91sam9260-sdramc";
>>> + reg = <0xffffea00 0x200>;
>>> + };
>>> +
>>
>> You probably copied/pasted it but according to the block diagram, the
>> sdram controller is not under the apb.
> You're right I copied/pasted :o) But the addresses of the registers
> look like typical APB addresses.
> AFAIK all the registers of this SOC are accessed through the APB
> (except for OHCI and LCDC)
Yes, that is the point: if the register bank appears as an APB address,
I place it on the APB bus.
The other master interfaces (on AHB) are the ones that the IP uses, not
us from the CPU point of view...
So I think that Jean-Jacques DT is okay concerning this.
> So probably the real question here is what is the sense of the bus
> hierarchy in cases where a controller is connected to several buses
> (APB for registers, AHB/matrix for other purpose) ?
> As I don't have any idea on how to handle this, I choose to copy/paste.
>
>>
>>> + matrix: matrix at ffffee00 {
>>> + compatible = "atmel,at91sam9261-bus-matrix";
>>> + reg = <0xffffee00 0x200>;
>>> + };
>>> +
>>
>> Same here, the apb is actually under the bus matrix.
>>
>> I don't know whether it can be represented another way though.
>>
>>
>> --
>> Alexandre Belloni, Free Electrons
>> Embedded Linux, Kernel and Android engineering
>> http://free-electrons.com
>
>
--
Nicolas Ferre
next prev parent reply other threads:[~2014-02-13 8:10 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-12 10:06 [PATCH v4 0/8] Device Tree support for the at91sam9261ek Jean-Jacques Hiblot
2014-02-12 10:06 ` [PATCH v4 1/8] at91: dt: Adds support for the bus matrix declaration in the DT Jean-Jacques Hiblot
2014-02-12 10:45 ` Gregory CLEMENT
2014-02-12 10:54 ` Nicolas Ferre
2014-02-12 10:06 ` [PATCH v4 2/8] at91: pinctrl: don't request GPIOs used for interrupts but lock them as IRQ Jean-Jacques Hiblot
2014-02-12 17:47 ` Nicolas Ferre
2014-02-24 13:25 ` Linus Walleij
2014-02-25 9:35 ` Jean-Jacques Hiblot
2014-02-25 9:47 ` Jean-Jacques Hiblot
2014-02-12 10:06 ` [PATCH v4 3/8] at91: dt: Add at91sam9261 dt SoC support Jean-Jacques Hiblot
2014-02-12 17:28 ` Alexandre Belloni
2014-02-12 19:47 ` Jean-Jacques Hiblot
2014-02-13 8:10 ` Nicolas Ferre [this message]
2014-02-13 8:54 ` Alexandre Belloni
2014-02-12 21:04 ` Alexandre Belloni
2014-02-13 6:11 ` Jean-Jacques Hiblot
2014-02-12 10:06 ` [PATCH v4 4/8] at91: dt: defconfig: Added the sam9261 to the list of DT-enabled SOCs Jean-Jacques Hiblot
2014-02-12 10:06 ` [PATCH v4 5/8] at91: dt: sam9261: Device Tree support for the at91sam9261ek Jean-Jacques Hiblot
2014-02-12 10:06 ` [PATCH v4 6/8] at91: updated the at91_dt_defconfig with support for the ADS7846 Jean-Jacques Hiblot
2014-02-12 10:06 ` [PATCH v4 7/8] ARM: at91: prepare common clk transition for sam9261 SoC Jean-Jacques Hiblot
2014-02-12 10:06 ` [PATCH v4 8/8] ARM: at91: move sam9261 SoC to common clk Jean-Jacques Hiblot
2014-02-12 11:14 ` [PATCH v4 0/8] Device Tree support for the at91sam9261ek Gregory CLEMENT
2014-02-12 12:34 ` Thomas Petazzoni
2014-02-12 12:36 ` Jean-Jacques Hiblot
2014-02-12 12:44 ` Thomas Petazzoni
2014-02-12 13:01 ` Jean-Jacques Hiblot
2014-02-12 12:35 ` Jean-Jacques Hiblot
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