From: thunder.leizhen@huawei•com (leizhen)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 5/5] iommu/arm-smmu: prefer stage-1 mappings where we have a choice
Date: Wed, 9 Jul 2014 14:36:39 +0800 [thread overview]
Message-ID: <53BCE2F7.2070407@huawei.com> (raw)
In-Reply-To: <1404125530-17984-6-git-send-email-will.deacon@arm.com>
On 2014/6/30 18:52, Will Deacon wrote:
> For an SMMU that supports both Stage-1 and Stage-2 mappings (but not
> nested translation), then we should prefer stage-1 mappings as we
> otherwise rely on the memory attributes of the incoming transactions
> for IOMMU_CACHE mappings.
>
> Signed-off-by: Will Deacon <will.deacon@arm•com>
> ---
> drivers/iommu/arm-smmu.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> index 60986de3ada8..a6e38982d09c 100644
> --- a/drivers/iommu/arm-smmu.c
> +++ b/drivers/iommu/arm-smmu.c
> @@ -876,12 +876,12 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
> */
> cfg->cbar = CBAR_TYPE_S1_TRANS_S2_BYPASS;
> start = smmu->num_s2_context_banks;
> - } else if (smmu->features & ARM_SMMU_FEAT_TRANS_S2) {
> - cfg->cbar = CBAR_TYPE_S2_TRANS;
> - start = 0;
> - } else {
> + } else if (smmu->features & ARM_SMMU_FEAT_TRANS_S1) {
> cfg->cbar = CBAR_TYPE_S1_TRANS_S2_BYPASS;
> start = smmu->num_s2_context_banks;
> + } else {
> + cfg->cbar = CBAR_TYPE_S2_TRANS;
> + start = 0;
> }
>
> ret = __arm_smmu_alloc_bitmap(smmu->context_map, start,
>
Why not change ARM_SMMU_FEAT_TRANS_NESTED to ARM_SMMU_FEAT_TRANS_S1 in the
former if stagement? Then we can merge the two branches, actually it is the
same. NESTED means both S1 and S2.
thunder
prev parent reply other threads:[~2014-07-09 6:36 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-30 10:52 [PATCH 0/5] iommu/arm-smmu: Updates for 3.17 Will Deacon
2014-06-30 10:52 ` [PATCH 1/5] iommu/arm-smmu: fix calculation of TCR.T0SZ Will Deacon
2014-06-30 10:52 ` [PATCH 2/5] iommu/arm-smmu: add support for PCI master devices Will Deacon
2014-07-03 14:22 ` Varun Sethi
2014-07-03 14:43 ` Will Deacon
2014-07-04 7:41 ` Varun Sethi
2014-07-04 8:13 ` Will Deacon
2014-07-09 13:26 ` Will Deacon
2014-07-09 14:13 ` Alex Williamson
2014-07-09 16:39 ` Will Deacon
2014-10-06 12:42 ` Will Deacon
2014-07-09 14:21 ` Varun Sethi
2014-06-30 10:52 ` [PATCH 3/5] iommu/arm-smmu: caps: add IOMMU_CAP_INTR_REMAP capability Will Deacon
2014-06-30 10:52 ` [PATCH 4/5] iommu/arm-smmu: remove support for chained SMMUs Will Deacon
2014-06-30 10:52 ` [PATCH 5/5] iommu/arm-smmu: prefer stage-1 mappings where we have a choice Will Deacon
2014-07-09 6:36 ` leizhen [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=53BCE2F7.2070407@huawei.com \
--to=thunder.leizhen@huawei$(echo .)com \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox