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From: ttynkkynen@nvidia•com (Tuomas Tynkkynen)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v3 03/15] clk: tegra: Add closed loop support for the DFLL
Date: Tue, 19 Aug 2014 22:52:59 +0300	[thread overview]
Message-ID: <53F3AB1B.70703@nvidia.com> (raw)
In-Reply-To: <53F2D454.2020000@nvidia.com>

On 19/08/14 07:36, Vince Hsu wrote:
> Hi,
> 
> On 08/19/2014 11:33 AM, Tuomas Tynkkynen wrote:
[...]
>> +    dfll_writel(td, val, DFLL_OUTPUT_CFG);
>> +    dfll_wmb(td);
> Sorry that I forgot to mention this in v2's comment. Could you squash the change below in this patch? And actually it's pretty easy to misuse the dfll read/write/wmb functions. We might want to have some generic functions for these, and let the generic functions handle the offset to different register blocks.
> 

Indeed, having single readl/writel and handling the different register areas there
sounds much better, I'll implement that.

[...]
> diff --git a/drivers/clk/tegra/clk-dfll.c b/drivers/clk/tegra/clk-dfll.c
> index 9b3eded6b880..71e4b256ea0d 100644
> --- a/drivers/clk/tegra/clk-dfll.c
> +++ b/drivers/clk/tegra/clk-dfll.c
> @@ -645,7 +645,7 @@ static void dfll_init_out_if(struct tegra_dfll *td)
>         val = (td->lut_safe << DFLL_OUTPUT_CFG_SAFE_SHIFT) |
>                 (td->lut_max << DFLL_OUTPUT_CFG_MAX_SHIFT) |
>                 (td->lut_min << DFLL_OUTPUT_CFG_MIN_SHIFT);
> -       dfll_writel(td, val, DFLL_OUTPUT_CFG);
> +       dfll_i2c_writel(td, val, DFLL_OUTPUT_CFG);
> -        dfll_wmb(td);
> +        dfll_i2c_wmb(td);
> 
>         dfll_writel(td, 0, DFLL_OUTPUT_FORCE);
> @@ -1146,7 +1146,8 @@ static int attr_registers_show(struct seq_file *s, void *data)
>         seq_puts(s, "CONTROL REGISTERS:\n");
>         for (offs = 0; offs <= DFLL_MONITOR_DATA; offs += 4)
>                 seq_printf(s, "[0x%02x] = 0x%08x\n", offs,
> -                          dfll_readl(td, offs));
> +                               offs == DFLL_OUTPUT_CFG ? dfll_i2c_readl(td, offs) :
> +                                       dfll_readl(td, offs));
> 
>         seq_puts(s, "\nI2C and INTR REGISTERS:\n");
>         for (offs = DFLL_I2C_CFG; offs <= DFLL_I2C_STS; offs += 4)
> 
> 
> 
> Thanks,
> Vince

-- 
nvpublic

  reply	other threads:[~2014-08-19 19:52 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-08-19  3:33 [PATCH v3 00/15] Tegra124 CL-DVFS / DFLL clocksource, plus cpufreq Tuomas Tynkkynen
2014-08-19  3:33 ` [PATCH v3 01/15] clk: tegra: Add binding for the Tegra124 DFLL clocksource Tuomas Tynkkynen
2014-08-19  3:33 ` [PATCH v3 02/15] clk: tegra: Add library for the DFLL clock source (open-loop mode) Tuomas Tynkkynen
2014-08-19  3:33 ` [PATCH v3 03/15] clk: tegra: Add closed loop support for the DFLL Tuomas Tynkkynen
2014-08-19  4:36   ` Vince Hsu
2014-08-19 19:52     ` Tuomas Tynkkynen [this message]
2014-08-20  3:01   ` Vince Hsu
2014-08-19  3:33 ` [PATCH v3 04/15] clk: tegra: Add functions for parsing CVB tables Tuomas Tynkkynen
2014-08-19  3:33 ` [PATCH v3 05/15] clk: tegra: Add DFLL DVCO reset control for Tegra124 Tuomas Tynkkynen
2014-08-19  3:33 ` [PATCH v3 06/15] clk: tegra: Add Tegra124 DFLL clocksource platform driver Tuomas Tynkkynen
2014-08-19  3:33 ` [PATCH v3 07/15] clk: tegra: Save/restore CCLKG_BURST_POLICY on suspend Tuomas Tynkkynen
2014-08-19  3:33 ` [PATCH v3 08/15] clk: tegra: Add the DFLL as a possible parent of the cclk_g clock Tuomas Tynkkynen
2014-08-19  3:33 ` [PATCH v3 09/15] ARM: tegra: Add the DFLL to Tegra124 device tree Tuomas Tynkkynen
2014-08-19  3:33 ` [PATCH v3 10/15] ARM: tegra: Enable the DFLL on the Jetson TK1 Tuomas Tynkkynen
2014-08-19  3:33 ` [PATCH v3 11/15] cpufreq: tegra124: Add device tree bindings Tuomas Tynkkynen
2014-08-19  3:33 ` [PATCH v3 12/15] cpufreq: tegra: Rename tegra-cpufreq to tegra20-cpufreq Tuomas Tynkkynen
2014-08-19  3:47   ` Viresh Kumar
2014-08-19  3:33 ` [PATCH v3 13/15] cpufreq: Add cpufreq driver for Tegra124 Tuomas Tynkkynen
2014-08-19  5:55   ` Viresh Kumar
2014-08-19 19:44     ` Tuomas Tynkkynen
2014-08-20  6:39       ` Viresh Kumar
2014-08-20 15:39         ` Javier Martinez Canillas
2014-08-20 20:02           ` Handling commit change logs (was: [PATCH v3 13/15] cpufreq: Add cpufreq driver for Tegra124) Andreas Färber
2014-08-20 20:30             ` Handling commit change logs Stephen Warren
2014-08-21  4:26               ` Viresh Kumar
2014-08-21  6:13                 ` Heiko Schocher
2014-08-21 10:35                   ` Javier Martinez Canillas
2014-08-21 10:49                     ` Heiko Schocher
2014-08-21 10:43               ` Andreas Färber
2014-08-21 10:34             ` Handling commit change logs (was: [PATCH v3 13/15] cpufreq: Add cpufreq driver for Tegra124) Javier Martinez Canillas
2014-08-19  3:33 ` [PATCH v3 14/15] ARM: tegra: Add entries for cpufreq on Tegra124 Tuomas Tynkkynen
2014-08-19  3:33 ` [PATCH v3 15/15] ARM: tegra: Add CPU regulator to the Jetson TK1 device tree Tuomas Tynkkynen

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