From: vinceh@nvidia•com (Vince Hsu)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v3 03/15] clk: tegra: Add closed loop support for the DFLL
Date: Wed, 20 Aug 2014 11:01:47 +0800 [thread overview]
Message-ID: <53F40F9B.6070808@nvidia.com> (raw)
In-Reply-To: <1408419205-10048-4-git-send-email-tuomas.tynkkynen@iki.fi>
Hi,
On 08/19/2014 11:33 AM, Tuomas Tynkkynen wrote:
> From: Tuomas Tynkkynen <ttynkkynen@nvidia•com>
>
> With closed loop support, the clock rate of the DFLL can be adjusted.
>
> The oscillator itself in the DFLL is a free-running oscillator whose
> rate is directly determined the supply voltage. However, the DFLL
> module contains logic to compare the DFLL output rate to a fixed
> reference clock (51 MHz) and make a decision to either lower or raise
> the DFLL supply voltage. The DFLL module can then autonomously change
> the supply voltage by communicating with an off-chip PMIC via either I2C
> or PWM signals. This driver currently supports only I2C.
>
> Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia•com>
>
> ---
> v3: Fix incorrect order of arguments to dfll_scale_dvco_rate
> ---
> drivers/clk/tegra/clk-dfll.c | 656 ++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 653 insertions(+), 3 deletions(-)
>
...
>
> /**
> + * dfll_fetch_i2c_params - query PMIC I2C params from DT & regulator subsystem
> + * @td: DFLL instance
> + *
> + * Read all the parameters required for operation in I2C mode. The parameters
> + * can originate from the device tree or the regulator subsystem.
> + * Returns 0 on success or -err on failure.
> + */
> +static int dfll_fetch_i2c_params(struct tegra_dfll *td)
> +{
> + struct regmap *regmap;
> + struct device *i2c_dev;
> + struct i2c_client *i2c_client;
> + int vsel_reg, vsel_mask;
> + int ret;
> +
> + if (!read_dt_param(td, "nvidia,i2c-fs-rate", &td->i2c_fs_rate))
> + return -EINVAL;
> +
> + regmap = regulator_get_regmap(td->vdd_reg);
> + i2c_dev = regmap_get_device(regmap);
> + i2c_client = to_i2c_client(i2c_dev);
> +
> + td->i2c_slave_addr = i2c_client->addr;
> +
> + ret = regulator_get_hardware_vsel_register(td->vdd_reg,
> + &vsel_reg,
> + &vsel_mask);
> + if (ret < 0) {
> + dev_err(td->dev,
> + "regulator unsuitable for DFLL I2C operation\n");
> + return -EINVAL;
> + }
> +
It seems that the td->i2c_reg never gets initialized, and we're lucky on
JetsonTK1 or Norrin. We should initialize the regulator offset here. Like:
td->i2c_reg = vsel_reg;
Thanks,
Vince
> + ret = dfll_build_i2c_lut(td);
> + if (ret) {
> + dev_err(td->dev, "couldn't build I2C LUT\n");
> + return ret;
> + }
> +
> + return 0;
> +}
> +
next prev parent reply other threads:[~2014-08-20 3:01 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-19 3:33 [PATCH v3 00/15] Tegra124 CL-DVFS / DFLL clocksource, plus cpufreq Tuomas Tynkkynen
2014-08-19 3:33 ` [PATCH v3 01/15] clk: tegra: Add binding for the Tegra124 DFLL clocksource Tuomas Tynkkynen
2014-08-19 3:33 ` [PATCH v3 02/15] clk: tegra: Add library for the DFLL clock source (open-loop mode) Tuomas Tynkkynen
2014-08-19 3:33 ` [PATCH v3 03/15] clk: tegra: Add closed loop support for the DFLL Tuomas Tynkkynen
2014-08-19 4:36 ` Vince Hsu
2014-08-19 19:52 ` Tuomas Tynkkynen
2014-08-20 3:01 ` Vince Hsu [this message]
2014-08-19 3:33 ` [PATCH v3 04/15] clk: tegra: Add functions for parsing CVB tables Tuomas Tynkkynen
2014-08-19 3:33 ` [PATCH v3 05/15] clk: tegra: Add DFLL DVCO reset control for Tegra124 Tuomas Tynkkynen
2014-08-19 3:33 ` [PATCH v3 06/15] clk: tegra: Add Tegra124 DFLL clocksource platform driver Tuomas Tynkkynen
2014-08-19 3:33 ` [PATCH v3 07/15] clk: tegra: Save/restore CCLKG_BURST_POLICY on suspend Tuomas Tynkkynen
2014-08-19 3:33 ` [PATCH v3 08/15] clk: tegra: Add the DFLL as a possible parent of the cclk_g clock Tuomas Tynkkynen
2014-08-19 3:33 ` [PATCH v3 09/15] ARM: tegra: Add the DFLL to Tegra124 device tree Tuomas Tynkkynen
2014-08-19 3:33 ` [PATCH v3 10/15] ARM: tegra: Enable the DFLL on the Jetson TK1 Tuomas Tynkkynen
2014-08-19 3:33 ` [PATCH v3 11/15] cpufreq: tegra124: Add device tree bindings Tuomas Tynkkynen
2014-08-19 3:33 ` [PATCH v3 12/15] cpufreq: tegra: Rename tegra-cpufreq to tegra20-cpufreq Tuomas Tynkkynen
2014-08-19 3:47 ` Viresh Kumar
2014-08-19 3:33 ` [PATCH v3 13/15] cpufreq: Add cpufreq driver for Tegra124 Tuomas Tynkkynen
2014-08-19 5:55 ` Viresh Kumar
2014-08-19 19:44 ` Tuomas Tynkkynen
2014-08-20 6:39 ` Viresh Kumar
2014-08-20 15:39 ` Javier Martinez Canillas
2014-08-20 20:02 ` Handling commit change logs (was: [PATCH v3 13/15] cpufreq: Add cpufreq driver for Tegra124) Andreas Färber
2014-08-20 20:30 ` Handling commit change logs Stephen Warren
2014-08-21 4:26 ` Viresh Kumar
2014-08-21 6:13 ` Heiko Schocher
2014-08-21 10:35 ` Javier Martinez Canillas
2014-08-21 10:49 ` Heiko Schocher
2014-08-21 10:43 ` Andreas Färber
2014-08-21 10:34 ` Handling commit change logs (was: [PATCH v3 13/15] cpufreq: Add cpufreq driver for Tegra124) Javier Martinez Canillas
2014-08-19 3:33 ` [PATCH v3 14/15] ARM: tegra: Add entries for cpufreq on Tegra124 Tuomas Tynkkynen
2014-08-19 3:33 ` [PATCH v3 15/15] ARM: tegra: Add CPU regulator to the Jetson TK1 device tree Tuomas Tynkkynen
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