From: emilio@elopez•com.ar (Emilio López)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH] clk: sunxi: add correct divider table for sun4i-apb0 clock
Date: Sat, 06 Sep 2014 12:55:18 -0300 [thread overview]
Message-ID: <540B2E66.1020509@elopez.com.ar> (raw)
In-Reply-To: <1409985910-30737-1-git-send-email-wens@csie.org>
Hi,
El 06/09/14 a las 03:45, Chen-Yu Tsai escibi?:
> The sun4i-apb0 clock, as found on all platforms using it, is a
> power-of-two-based divider clock, with a special divider of 2
> for value 0.
>
> This was causing the clock framework to incorrectly calculate
> the clock rate for apb1 and related modules on sun6i and sun8i.
> On sun[4/5/7]i, u-boot SPL configures the divider with value 1
> for /2 divider, so no suprises there.
>
> This patch adds a proper divider table for it, so the correct
> clock rate can be calculated.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie•org>
From a quick look at the A10 manual,
Acked-by: Emilio L?pez <emilio@elopez•com.ar>
I'll see about testing it on hardware today/tomorrow
Thanks!
Emilio
next prev parent reply other threads:[~2014-09-06 15:55 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-06 6:45 [PATCH] clk: sunxi: add correct divider table for sun4i-apb0 clock Chen-Yu Tsai
2014-09-06 15:55 ` Emilio López [this message]
2014-09-13 8:08 ` Maxime Ripard
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