* [PATCH v3 1/4] gpio: syscon: add soc specific callback to assign output value
2014-09-03 17:05 [PATCH v3 0/4] gpio: syscon: reuse for keystone 2 socs Grygorii Strashko
@ 2014-09-03 17:05 ` Grygorii Strashko
2014-09-03 17:05 ` [PATCH v3 2/4] gpio: syscon: retrive syscon node and regs offsets from dt Grygorii Strashko
` (3 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Grygorii Strashko @ 2014-09-03 17:05 UTC (permalink / raw)
To: linux-arm-kernel
Some SoCs (like Keystone) may require to perform special
sequence of operations to assign output GPIO value, so default
implementation of .set() callback from gpio-syscon driver
can't be used.
Hence, add optional, SoC specific callback to assign output
gpio value.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti•com>
---
drivers/gpio/gpio-syscon.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c
index 30884fb..d50ff93 100644
--- a/drivers/gpio/gpio-syscon.c
+++ b/drivers/gpio/gpio-syscon.c
@@ -37,6 +37,8 @@
* dat_bit_offset: Offset (in bits) to the first GPIO bit.
* dir_bit_offset: Optional offset (in bits) to the first bit to switch
* GPIO direction (Used with GPIO_SYSCON_FEAT_DIR flag).
+ * set: HW specific callback to assigns output value
+ * for signal "offset"
*/
struct syscon_gpio_data {
@@ -45,6 +47,8 @@ struct syscon_gpio_data {
unsigned int bit_count;
unsigned int dat_bit_offset;
unsigned int dir_bit_offset;
+ void (*set)(struct gpio_chip *chip,
+ unsigned offset, int value);
};
struct syscon_gpio_priv {
@@ -111,7 +115,7 @@ static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val)
BIT(offs % SYSCON_REG_BITS));
}
- syscon_gpio_set(chip, offset, val);
+ priv->data->set(chip, offset, val);
return 0;
}
@@ -159,7 +163,7 @@ static int syscon_gpio_probe(struct platform_device *pdev)
if (priv->data->flags & GPIO_SYSCON_FEAT_IN)
priv->chip.direction_input = syscon_gpio_dir_in;
if (priv->data->flags & GPIO_SYSCON_FEAT_OUT) {
- priv->chip.set = syscon_gpio_set;
+ priv->chip.set = priv->data->set ? : syscon_gpio_set;
priv->chip.direction_output = syscon_gpio_dir_out;
}
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v3 2/4] gpio: syscon: retrive syscon node and regs offsets from dt
2014-09-03 17:05 [PATCH v3 0/4] gpio: syscon: reuse for keystone 2 socs Grygorii Strashko
2014-09-03 17:05 ` [PATCH v3 1/4] gpio: syscon: add soc specific callback to assign output value Grygorii Strashko
@ 2014-09-03 17:05 ` Grygorii Strashko
2014-09-03 17:05 ` [PATCH v3 3/4] gpio: syscon: reuse for keystone 2 socs Grygorii Strashko
` (2 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Grygorii Strashko @ 2014-09-03 17:05 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds handling of new "gpio,syscon-dev" DT property,
which allows to specify syscon node and data/direction registers
offsets in DT.
"gpio,syscon-dev" has following format:
gpio,syscon-dev = <&syscon_dev data_reg_offset [direction_reg_offset]>;
where
- syscon_dev - phandle on syscon node
- data_reg_offset - offset of data register (in bytes)
- direction_reg_offset - offset of dirrection register (optional, in bytes)
for example:
gpio,syscon-dev = <&devctrl 0x254>;
In such way, the support of multiple Syscon GPIO devices is added.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti•com>
---
drivers/gpio/gpio-syscon.c | 51 ++++++++++++++++++++++++++++++++++++++--------
1 file changed, 43 insertions(+), 8 deletions(-)
diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c
index d50ff93..049391b 100644
--- a/drivers/gpio/gpio-syscon.c
+++ b/drivers/gpio/gpio-syscon.c
@@ -55,6 +55,8 @@ struct syscon_gpio_priv {
struct gpio_chip chip;
struct regmap *syscon;
const struct syscon_gpio_data *data;
+ u32 dreg_offset;
+ u32 dir_reg_offset;
};
static inline struct syscon_gpio_priv *to_syscon_gpio(struct gpio_chip *chip)
@@ -65,9 +67,11 @@ static inline struct syscon_gpio_priv *to_syscon_gpio(struct gpio_chip *chip)
static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset)
{
struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
- unsigned int val, offs = priv->data->dat_bit_offset + offset;
+ unsigned int val, offs;
int ret;
+ offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;
+
ret = regmap_read(priv->syscon,
(offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE, &val);
if (ret)
@@ -79,7 +83,9 @@ static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset)
static void syscon_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
{
struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
- unsigned int offs = priv->data->dat_bit_offset + offset;
+ unsigned int offs;
+
+ offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;
regmap_update_bits(priv->syscon,
(offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
@@ -92,7 +98,10 @@ static int syscon_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) {
- unsigned int offs = priv->data->dir_bit_offset + offset;
+ unsigned int offs;
+
+ offs = priv->dir_reg_offset +
+ priv->data->dir_bit_offset + offset;
regmap_update_bits(priv->syscon,
(offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
@@ -107,7 +116,10 @@ static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val)
struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) {
- unsigned int offs = priv->data->dir_bit_offset + offset;
+ unsigned int offs;
+
+ offs = priv->dir_reg_offset +
+ priv->data->dir_bit_offset + offset;
regmap_update_bits(priv->syscon,
(offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
@@ -142,6 +154,8 @@ static int syscon_gpio_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
const struct of_device_id *of_id = of_match_device(syscon_gpio_ids, dev);
struct syscon_gpio_priv *priv;
+ struct device_node *np = dev->of_node;
+ int ret;
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
@@ -149,10 +163,31 @@ static int syscon_gpio_probe(struct platform_device *pdev)
priv->data = of_id->data;
- priv->syscon =
- syscon_regmap_lookup_by_compatible(priv->data->compatible);
- if (IS_ERR(priv->syscon))
- return PTR_ERR(priv->syscon);
+ if (priv->data->compatible) {
+ priv->syscon = syscon_regmap_lookup_by_compatible(
+ priv->data->compatible);
+ if (IS_ERR(priv->syscon))
+ return PTR_ERR(priv->syscon);
+ } else {
+ priv->syscon =
+ syscon_regmap_lookup_by_phandle(np, "gpio,syscon-dev");
+ if (IS_ERR(priv->syscon))
+ return PTR_ERR(priv->syscon);
+
+ ret = of_property_read_u32_index(np, "gpio,syscon-dev", 1,
+ &priv->dreg_offset);
+ if (ret)
+ dev_err(dev, "can't read the data register offset!\n");
+
+ priv->dreg_offset <<= 3;
+
+ ret = of_property_read_u32_index(np, "gpio,syscon-dev", 2,
+ &priv->dir_reg_offset);
+ if (ret)
+ dev_err(dev, "can't read the dir register offset!\n");
+
+ priv->dir_reg_offset <<= 3;
+ }
priv->chip.dev = dev;
priv->chip.owner = THIS_MODULE;
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v3 3/4] gpio: syscon: reuse for keystone 2 socs
2014-09-03 17:05 [PATCH v3 0/4] gpio: syscon: reuse for keystone 2 socs Grygorii Strashko
2014-09-03 17:05 ` [PATCH v3 1/4] gpio: syscon: add soc specific callback to assign output value Grygorii Strashko
2014-09-03 17:05 ` [PATCH v3 2/4] gpio: syscon: retrive syscon node and regs offsets from dt Grygorii Strashko
@ 2014-09-03 17:05 ` Grygorii Strashko
2014-09-05 8:30 ` Linus Walleij
2014-09-03 17:05 ` [PATCH v3 4/4] ARM: dts: keystone-k2hk: add dsp gpio controllers nodes Grygorii Strashko
2014-09-16 21:43 ` [PATCH v3 0/4] gpio: syscon: reuse for keystone 2 socs Linus Walleij
4 siblings, 1 reply; 9+ messages in thread
From: Grygorii Strashko @ 2014-09-03 17:05 UTC (permalink / raw)
To: linux-arm-kernel
On Keystone SOCs, ARM host can send interrupts to DSP cores using the
DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ signals for
each DSP core. This is one of the component used by the IPC mechanism used
on Keystone SOCs.
Keystone 2 DSP GPIO controller has specific features:
- each GPIO can be configured only as output pin;
- setting GPIO value to 1 causes IRQ generation on target DSP core;
- reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
pending.
This patch updates gpio-syscon driver to be reused by Keystone 2 SoCs,
because the Keystone 2 DSP GPIO controller is controlled through Syscon
devices and, as requested by Linus Walleij, such kind of GPIO controllers
should be integrated with drivers/gpio/gpio-syscon.c driver.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti•com>
---
.../devicetree/bindings/gpio/gpio-dsp-keystone.txt | 39 ++++++++++++++++++++++
drivers/gpio/gpio-syscon.c | 35 +++++++++++++++++++
2 files changed, 74 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/gpio-dsp-keystone.txt
diff --git a/Documentation/devicetree/bindings/gpio/gpio-dsp-keystone.txt b/Documentation/devicetree/bindings/gpio/gpio-dsp-keystone.txt
new file mode 100644
index 0000000..6c7e6c7
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-dsp-keystone.txt
@@ -0,0 +1,39 @@
+Keystone 2 DSP GPIO controller bindings
+
+HOST OS userland running on ARM can send interrupts to DSP cores using
+the DSP GPIO controller IP. It provides 28 IRQ signals per each DSP core.
+This is one of the component used by the IPC mechanism used on Keystone SOCs.
+
+For example TCI6638K2K SoC has 8 DSP GPIO controllers:
+ - 8 for C66x CorePacx CPUs 0-7
+
+Keystone 2 DSP GPIO controller has specific features:
+- each GPIO can be configured only as output pin;
+- setting GPIO value to 1 causes IRQ generation on target DSP core;
+- reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
+ pending.
+
+Required Properties:
+- compatible: should be "ti,keystone-dsp-gpio"
+- ti,syscon-dev: phandle/offset pair. The phandle to syscon used to
+ access device state control registers and the offset of device's specific
+ registers within device state control registers range.
+- gpio-controller: Marks the device node as a gpio controller.
+- #gpio-cells: Should be 2.
+
+Please refer to gpio.txt in this directory for details of the common GPIO
+bindings used by client devices.
+
+Example:
+ dspgpio0: keystone_dsp_gpio at 02620240 {
+ compatible = "ti,keystone-dsp-gpio";
+ ti,syscon-dev = <&devctrl 0x240>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ dsp0: dsp0 {
+ compatible = "linux,rproc-user";
+ ...
+ kick-gpio = <&dspgpio0 27>;
+ };
diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c
index 049391b..e82fde4 100644
--- a/drivers/gpio/gpio-syscon.c
+++ b/drivers/gpio/gpio-syscon.c
@@ -140,11 +140,46 @@ static const struct syscon_gpio_data clps711x_mctrl_gpio = {
.dat_bit_offset = 0x40 * 8 + 8,
};
+#define KEYSTONE_LOCK_BIT BIT(0)
+
+static void keystone_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
+{
+ struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
+ unsigned int offs;
+ int ret;
+
+ offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;
+
+ if (!val)
+ return;
+
+ ret = regmap_update_bits(
+ priv->syscon,
+ (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
+ BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT,
+ BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT);
+ if (ret < 0)
+ dev_err(chip->dev, "gpio write failed ret(%d)\n", ret);
+}
+
+static const struct syscon_gpio_data keystone_dsp_gpio = {
+ /* ARM Keystone 2 */
+ .compatible = NULL,
+ .flags = GPIO_SYSCON_FEAT_OUT,
+ .bit_count = 28,
+ .dat_bit_offset = 4,
+ .set = keystone_gpio_set,
+};
+
static const struct of_device_id syscon_gpio_ids[] = {
{
.compatible = "cirrus,clps711x-mctrl-gpio",
.data = &clps711x_mctrl_gpio,
},
+ {
+ .compatible = "ti,keystone-dsp-gpio",
+ .data = &keystone_dsp_gpio,
+ },
{ }
};
MODULE_DEVICE_TABLE(of, syscon_gpio_ids);
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v3 3/4] gpio: syscon: reuse for keystone 2 socs
2014-09-03 17:05 ` [PATCH v3 3/4] gpio: syscon: reuse for keystone 2 socs Grygorii Strashko
@ 2014-09-05 8:30 ` Linus Walleij
2014-09-05 8:40 ` Alexander Shiyan
0 siblings, 1 reply; 9+ messages in thread
From: Linus Walleij @ 2014-09-05 8:30 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 3, 2014 at 7:05 PM, Grygorii Strashko
<grygorii.strashko@ti•com> wrote:
> On Keystone SOCs, ARM host can send interrupts to DSP cores using the
> DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ signals for
> each DSP core. This is one of the component used by the IPC mechanism used
> on Keystone SOCs.
>
> Keystone 2 DSP GPIO controller has specific features:
> - each GPIO can be configured only as output pin;
> - setting GPIO value to 1 causes IRQ generation on target DSP core;
> - reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
> pending.
>
> This patch updates gpio-syscon driver to be reused by Keystone 2 SoCs,
> because the Keystone 2 DSP GPIO controller is controlled through Syscon
> devices and, as requested by Linus Walleij, such kind of GPIO controllers
> should be integrated with drivers/gpio/gpio-syscon.c driver.
>
> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti•com>
> ---
> .../devicetree/bindings/gpio/gpio-dsp-keystone.txt | 39 ++++++++++++++++++++++
Rob, can you look at these bindings?
I suspect they may fall under your category of "not a real device, but
leaking Linux implementation internals".
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 3/4] gpio: syscon: reuse for keystone 2 socs
2014-09-05 8:30 ` Linus Walleij
@ 2014-09-05 8:40 ` Alexander Shiyan
0 siblings, 0 replies; 9+ messages in thread
From: Alexander Shiyan @ 2014-09-05 8:40 UTC (permalink / raw)
To: linux-arm-kernel
Fri, 5 Sep 2014 10:30:20 +0200 ?? Linus Walleij <linus.walleij@linaro•org>:
> On Wed, Sep 3, 2014 at 7:05 PM, Grygorii Strashko
> <grygorii.strashko@ti•com> wrote:
>
> > On Keystone SOCs, ARM host can send interrupts to DSP cores using the
> > DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ signals for
> > each DSP core. This is one of the component used by the IPC mechanism used
> > on Keystone SOCs.
> >
> > Keystone 2 DSP GPIO controller has specific features:
> > - each GPIO can be configured only as output pin;
> > - setting GPIO value to 1 causes IRQ generation on target DSP core;
> > - reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
> > pending.
> >
> > This patch updates gpio-syscon driver to be reused by Keystone 2 SoCs,
> > because the Keystone 2 DSP GPIO controller is controlled through Syscon
> > devices and, as requested by Linus Walleij, such kind of GPIO controllers
> > should be integrated with drivers/gpio/gpio-syscon.c driver.
> >
> > Signed-off-by: Grygorii Strashko <grygorii.strashko@ti•com>
> > ---
> > .../devicetree/bindings/gpio/gpio-dsp-keystone.txt | 39 ++++++++++++++++++++++
>
> Rob, can you look at these bindings?
>
> I suspect they may fall under your category of "not a real device, but
> leaking Linux implementation internals".
This is the reason why I suggested to move the offsets in the driver.
---
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 4/4] ARM: dts: keystone-k2hk: add dsp gpio controllers nodes
2014-09-03 17:05 [PATCH v3 0/4] gpio: syscon: reuse for keystone 2 socs Grygorii Strashko
` (2 preceding siblings ...)
2014-09-03 17:05 ` [PATCH v3 3/4] gpio: syscon: reuse for keystone 2 socs Grygorii Strashko
@ 2014-09-03 17:05 ` Grygorii Strashko
2014-09-16 21:43 ` [PATCH v3 0/4] gpio: syscon: reuse for keystone 2 socs Linus Walleij
4 siblings, 0 replies; 9+ messages in thread
From: Grygorii Strashko @ 2014-09-03 17:05 UTC (permalink / raw)
To: linux-arm-kernel
Add Keystone 2 DSP GPIO nodes.
DSP GPIO banks 0-7 correspond to DSP0-DSP7
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti•com>
---
arch/arm/boot/dts/k2hk.dtsi | 56 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/arch/arm/boot/dts/k2hk.dtsi b/arch/arm/boot/dts/k2hk.dtsi
index 321ba2f..3287455 100644
--- a/arch/arm/boot/dts/k2hk.dtsi
+++ b/arch/arm/boot/dts/k2hk.dtsi
@@ -50,5 +50,61 @@
#interrupt-cells = <1>;
ti,syscon-dev = <&devctrl 0x2a0>;
};
+
+ dspgpio0: keystone_dsp_gpio at 02620240 {
+ compatible = "ti,keystone-dsp-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio,syscon-dev = <&devctrl 0x240>;
+ };
+
+ dspgpio1: keystone_dsp_gpio at 2620244 {
+ compatible = "ti,keystone-dsp-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio,syscon-dev = <&devctrl 0x244>;
+ };
+
+ dspgpio2: keystone_dsp_gpio at 2620248 {
+ compatible = "ti,keystone-dsp-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio,syscon-dev = <&devctrl 0x248>;
+ };
+
+ dspgpio3: keystone_dsp_gpio at 262024c {
+ compatible = "ti,keystone-dsp-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio,syscon-dev = <&devctrl 0x24c>;
+ };
+
+ dspgpio4: keystone_dsp_gpio at 2620250 {
+ compatible = "ti,keystone-dsp-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio,syscon-dev = <&devctrl 0x250>;
+ };
+
+ dspgpio5: keystone_dsp_gpio at 2620254 {
+ compatible = "ti,keystone-dsp-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio,syscon-dev = <&devctrl 0x254>;
+ };
+
+ dspgpio6: keystone_dsp_gpio at 2620258 {
+ compatible = "ti,keystone-dsp-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio,syscon-dev = <&devctrl 0x258>;
+ };
+
+ dspgpio7: keystone_dsp_gpio at 262025c {
+ compatible = "ti,keystone-dsp-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio,syscon-dev = <&devctrl 0x25c>;
+ };
};
};
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v3 0/4] gpio: syscon: reuse for keystone 2 socs
2014-09-03 17:05 [PATCH v3 0/4] gpio: syscon: reuse for keystone 2 socs Grygorii Strashko
` (3 preceding siblings ...)
2014-09-03 17:05 ` [PATCH v3 4/4] ARM: dts: keystone-k2hk: add dsp gpio controllers nodes Grygorii Strashko
@ 2014-09-16 21:43 ` Linus Walleij
2014-09-17 16:05 ` Grygorii Strashko
4 siblings, 1 reply; 9+ messages in thread
From: Linus Walleij @ 2014-09-16 21:43 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 3, 2014 at 10:05 AM, Grygorii Strashko
<grygorii.strashko@ti•com> wrote:
> This series intended to integrate Keystone 2 DSP GPIO controller functionality
> into gpio-syscon driver (drivers/gpio/gpio-syscon.c) as requested
> by Linus Walleij in [1].
OK no comments on DT stuff etc for two weeks, so merged patches
1-3, the 4th you can take through the keystone git.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH v3 0/4] gpio: syscon: reuse for keystone 2 socs
2014-09-16 21:43 ` [PATCH v3 0/4] gpio: syscon: reuse for keystone 2 socs Linus Walleij
@ 2014-09-17 16:05 ` Grygorii Strashko
0 siblings, 0 replies; 9+ messages in thread
From: Grygorii Strashko @ 2014-09-17 16:05 UTC (permalink / raw)
To: linux-arm-kernel
On 09/17/2014 12:43 AM, Linus Walleij wrote:
> On Wed, Sep 3, 2014 at 10:05 AM, Grygorii Strashko
> <grygorii.strashko@ti•com> wrote:
>
>> This series intended to integrate Keystone 2 DSP GPIO controller functionality
>> into gpio-syscon driver (drivers/gpio/gpio-syscon.c) as requested
>> by Linus Walleij in [1].
>
> OK no comments on DT stuff etc for two weeks, so merged patches
> 1-3, the 4th you can take through the keystone git.
>
Thank you.
Regards,
-grygorii
^ permalink raw reply [flat|nested] 9+ messages in thread