From: ddaney@caviumnetworks•com (David Daney)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 3/3] PCI: generic: Add support for Cavium ThunderX PCIe root complexes.
Date: Tue, 22 Sep 2015 12:02:26 -0700 [thread overview]
Message-ID: <5601A5C2.4030206@caviumnetworks.com> (raw)
In-Reply-To: <20150922185230.GR7356@arm.com>
On 09/22/2015 11:52 AM, Will Deacon wrote:
> On Thu, Sep 17, 2015 at 11:41:34PM +0100, David Daney wrote:
>> From: David Daney <david.daney@cavium•com>
>>
>> The config space for external PCIe root complexes on some Cavium
>> ThunderX SoCs is very similar to CAM and ECAM, but differs in the
>> shift values that have to be applied to the bus and devfn numbers to
>> compose that address window offset. These root complexes also have
>> the interesting property that there is no root bridge, so the standard
>> manner of limiting scanning to only the first device doesn't work. We
>> can use the standard pci-host-generic driver if we make a minor
>> addition to handle these differences, so we...
>>
>> Add a mapping function for ThunderX PCIe root complexes with a bus
>> shift of 24 and devfn shift of 16. Ignore accesses for devices other
>> than the first device on the primary bus.
>>
>> Document the whole thing in devicetree/bindings/pci/host-generic-pci.txt
>>
>> Signed-off-by: David Daney <david.daney@cavium•com>
>> ---
>> .../devicetree/bindings/pci/host-generic-pci.txt | 8 +++---
>> drivers/pci/host/pci-host-generic.c | 29 ++++++++++++++++++++++
>> 2 files changed, 34 insertions(+), 3 deletions(-)
>
> Thanks, this looks better now:
>
> Acked-by: Will Deacon <will.deacon@arm•com>
>
Thanks Will.
Because patches 1/3 and 2/3 will be reworked, I will re-send this as a
stand-alone patch.
David Daney
> Will
>
prev parent reply other threads:[~2015-09-22 19:02 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-17 22:41 [PATCH 0/3] PCI: Add support for Cavium ThunderX RC and on-SoC devices David Daney
2015-09-17 22:41 ` [PATCH 1/3] PCI: Allow quirks to override SRIOV BARs David Daney
2015-09-17 22:41 ` [PATCH 2/3] PCI: Add quirks for devices found on Cavium ThunderX SoCs David Daney
2015-09-18 7:19 ` Arnd Bergmann
2015-09-18 17:00 ` David Daney
2015-09-18 19:45 ` Arnd Bergmann
2015-09-19 1:00 ` David Daney
2015-09-22 13:19 ` Bjorn Helgaas
2015-09-23 16:24 ` David Daney
2015-09-22 15:39 ` Lorenzo Pieralisi
2015-09-22 19:33 ` Arnd Bergmann
2015-09-17 22:41 ` [PATCH 3/3] PCI: generic: Add support for Cavium ThunderX PCIe root complexes David Daney
2015-09-22 16:05 ` Lorenzo Pieralisi
2015-09-22 16:13 ` David Daney
2015-09-22 16:40 ` Lorenzo Pieralisi
2015-09-22 16:56 ` David Daney
2015-09-22 18:52 ` Will Deacon
2015-09-22 19:02 ` David Daney [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5601A5C2.4030206@caviumnetworks.com \
--to=ddaney@caviumnetworks$(echo .)com \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox