* [PATCH 0/1] aspeed: msx4: enable BMC networking via MAC0
@ 2026-05-05 5:05 Ender Hsieh
2026-05-05 5:05 ` [PATCH 1/1] ARM: dts: " Ender Hsieh
0 siblings, 1 reply; 3+ messages in thread
From: Ender Hsieh @ 2026-05-05 5:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery
Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel,
Andrew Lunn, Marc Olberding, Jacky Chou
Add the &mac0/&mdio3/ethphy3 nodes to the NVIDIA MSX4 board dts to
enable BMC networking. These nodes were intentionally omitted in
commit f28674fab34f ("ARM: dts: aspeed: Add NVIDIA MSX4 HPM") at
Andrew Lunn's request, pending RGMII delay handling clarification.
Following his guidance on linux-aspeed [1], the U-Boot bootloader
has been modified to stop enabling MAC clock delays on the SoC
side. With phy-mode = "rgmii-id", the PHY now adds the required
~2ns delay without any double-delay from the MAC controller.
Tested on alon8 hardware: 1G link negotiation succeeds with this
change in coordination with the U-Boot patch [2].
[1] https://patch.msgid.link/eac09481-0ba1-4ac2-ad8c-d859822ff0d5@lunn.ch
[2] https://patch.msgid.link/20260504044702.2613879-1-andhsieh@nvidia.com
Ender Hsieh (1):
ARM: dts: aspeed: msx4: enable BMC networking via MAC0
.../dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
--
2.34.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 1/1] ARM: dts: aspeed: msx4: enable BMC networking via MAC0
2026-05-05 5:05 [PATCH 0/1] aspeed: msx4: enable BMC networking via MAC0 Ender Hsieh
@ 2026-05-05 5:05 ` Ender Hsieh
2026-05-18 6:35 ` Andrew Jeffery
0 siblings, 1 reply; 3+ messages in thread
From: Ender Hsieh @ 2026-05-05 5:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery
Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel,
Andrew Lunn, Marc Olberding, Jacky Chou
Add &mac0, &mdio3, and the ethphy3 PHY node to enable BMC networking
on the AST2600-based NVIDIA MSX4 board. The PHY is attached to MDIO3
at address 2 and uses RGMII with PHY-internal delays.
These nodes were intentionally omitted in commit f28674fab34f ("ARM:
dts: aspeed: Add NVIDIA MSX4 HPM") at Andrew Lunn's request, pending
clarification of the RGMII delay handling. Following his guidance on
linux-aspeed, the bootloader has been modified to stop enabling MAC
clock delays on the SoC side, so phy-mode = "rgmii-id" correctly
results in the PHY adding the required ~2ns delay without any
double-delay from the MAC controller.
The corresponding U-Boot change has been submitted to openbmc/u-boot.
Link: https://patch.msgid.link/eac09481-0ba1-4ac2-ad8c-d859822ff0d5@lunn.ch
Link: https://patch.msgid.link/20260504044702.2613879-1-andhsieh@nvidia.com
Cc: Andrew Lunn <andrew@lunn•ch>
Cc: Marc Olberding <molberding@nvidia•com>
Signed-off-by: Ender Hsieh <andhsieh@nvidia•com>
---
.../dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts
index a12d4164de4a..29f56176e2ca 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts
@@ -208,6 +208,21 @@ &lpc_reset {
status = "okay";
};
+&mac0 {
+ phy-mode = "rgmii-id";
+ phy-handle = <ðphy3>;
+ status = "okay";
+};
+
+&mdio3 {
+ status = "okay";
+
+ ethphy3: ethernet-phy@2 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <2>;
+ };
+};
+
&rtc {
status = "okay";
};
--
2.34.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/1] ARM: dts: aspeed: msx4: enable BMC networking via MAC0
2026-05-05 5:05 ` [PATCH 1/1] ARM: dts: " Ender Hsieh
@ 2026-05-18 6:35 ` Andrew Jeffery
0 siblings, 0 replies; 3+ messages in thread
From: Andrew Jeffery @ 2026-05-18 6:35 UTC (permalink / raw)
To: Ender Hsieh, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley
Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel,
Andrew Lunn, Marc Olberding, Jacky Chou
On Tue, 2026-05-05 at 14:05 +0900, Ender Hsieh wrote:
> Add &mac0, &mdio3, and the ethphy3 PHY node to enable BMC networking
> on the AST2600-based NVIDIA MSX4 board. The PHY is attached to MDIO3
> at address 2 and uses RGMII with PHY-internal delays.
>
> These nodes were intentionally omitted in commit f28674fab34f ("ARM:
> dts: aspeed: Add NVIDIA MSX4 HPM") at Andrew Lunn's request, pending
> clarification of the RGMII delay handling. Following his guidance on
> linux-aspeed, the bootloader has been modified to stop enabling MAC
> clock delays on the SoC side, so phy-mode = "rgmii-id" correctly
> results in the PHY adding the required ~2ns delay without any
> double-delay from the MAC controller.
>
> The corresponding U-Boot change has been submitted to openbmc/u-boot.
>
> Link: https://patch.msgid.link/eac09481-0ba1-4ac2-ad8c-d859822ff0d5@lunn.ch
> Link: https://patch.msgid.link/20260504044702.2613879-1-andhsieh@nvidia.com
> Cc: Andrew Lunn <andrew@lunn•ch>
> Cc: Marc Olberding <molberding@nvidia•com>
> Signed-off-by: Ender Hsieh <andhsieh@nvidia•com>
> ---
> .../dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
I've applied this to the BMC tree. I've also applied the linked u-boot
patch to openbmc/u-boot, and backported this change to openbmc/linux.
Cheers,
Andrew
^ permalink raw reply [flat|nested] 3+ messages in thread
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2026-05-05 5:05 [PATCH 0/1] aspeed: msx4: enable BMC networking via MAC0 Ender Hsieh
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