From: rmk+kernel@arm•linux.org.uk (Russell King)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH 37/44] ARM: l2c: provide generic hook to intercept writes to secure registers
Date: Mon, 17 Mar 2014 00:16:40 +0000 [thread overview]
Message-ID: <E1WPLEO-0002eM-B2@rmk-PC.arm.linux.org.uk> (raw)
In-Reply-To: <20140317001302.GY21483@n2100.arm.linux.org.uk>
When Linux is running in the non-secure world, any write to a secure
L2C register will generate an abort. Platforms normally have to call
firmware to work around this. Provide a hook for them to intercept
any L2C secure register write.
Signed-off-by: Russell King <rmk+kernel@arm•linux.org.uk>
---
arch/arm/include/asm/outercache.h | 5 ++++-
arch/arm/mm/cache-l2x0.c | 34 ++++++++++++++++++++++++++--------
2 files changed, 30 insertions(+), 9 deletions(-)
diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h
index 1ee2cf23fae1..69f57a5c0dd3 100644
--- a/arch/arm/include/asm/outercache.h
+++ b/arch/arm/include/asm/outercache.h
@@ -33,8 +33,11 @@ struct outer_cache_fns {
#ifdef CONFIG_OUTER_CACHE_SYNC
void (*sync)(void);
#endif
- void (*set_debug)(unsigned long);
void (*resume)(void);
+
+ /* This is an ARM L2C thing */
+ void (*set_debug)(unsigned long);
+ void (*write_sec)(unsigned long, unsigned);
};
extern struct outer_cache_fns outer_cache;
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 44b8fd6ae2f6..f9fe70792bc9 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -59,13 +59,28 @@ static inline void l2c_wait_mask(void __iomem *reg, unsigned long mask)
}
/*
+ * By default, we write directly to secure registers. Platforms must
+ * override this if they are running non-secure.
+ */
+static void l2c_write_sec(unsigned long val, void __iomem *base, unsigned reg)
+{
+ if (outer_cache.write_sec)
+ outer_cache.write_sec(val, reg);
+ else
+ writel_relaxed(val, base + reg);
+}
+
+/*
* This should only be called when we have a requirement that the
* register be written due to a work-around, as platforms running
* in non-secure mode may not be able to access this register.
*/
static inline void l2c_set_debug(void __iomem *base, unsigned long val)
{
- outer_cache.set_debug(val);
+ if (outer_cache.set_debug)
+ outer_cache.set_debug(val);
+ else
+ l2c_write_sec(val, base, L2X0_DEBUG_CTRL);
}
static void __l2c_op_way(void __iomem *reg)
@@ -96,7 +111,7 @@ static void l2c_enable(void __iomem *base, u32 aux, unsigned num_lock)
l2c_unlock(base, num_lock);
- writel_relaxed(aux, base + L2X0_AUX_CTRL);
+ l2c_write_sec(aux, base, L2X0_AUX_CTRL);
local_irq_save(flags);
__l2c_op_way(base + L2X0_INV_WAY);
@@ -104,7 +119,7 @@ static void l2c_enable(void __iomem *base, u32 aux, unsigned num_lock)
l2c_wait_mask(base + sync_reg_offset, 1);
local_irq_restore(flags);
- writel_relaxed(L2X0_CTRL_EN, base + L2X0_CTRL);
+ l2c_write_sec(L2X0_CTRL_EN, base, L2X0_CTRL);
}
#ifdef CONFIG_CACHE_PL310
@@ -141,7 +156,7 @@ static inline void l2x0_inv_line(unsigned long addr)
#if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915)
static inline void debug_writel(unsigned long val)
{
- if (outer_cache.set_debug)
+ if (outer_cache.set_debug || outer_cache.write_sec)
l2c_set_debug(l2x0_base, val);
}
#else
@@ -330,7 +345,7 @@ static void l2x0_disable(void)
raw_spin_lock_irqsave(&l2x0_lock, flags);
__l2x0_flush_all();
- writel_relaxed(0, l2x0_base + L2X0_CTRL);
+ l2c_write_sec(0, l2x0_base, L2X0_CTRL);
dsb(st);
raw_spin_unlock_irqrestore(&l2x0_lock, flags);
}
@@ -349,12 +364,12 @@ static void l2x0_enable(void __iomem *base, u32 aux)
l2c_unlock(base, num_lock);
/* l2x0 controller is disabled */
- writel_relaxed(aux, base + L2X0_AUX_CTRL);
+ l2c_write_sec(aux, base, L2X0_AUX_CTRL);
l2x0_inv_all();
/* enable L2X0 */
- writel_relaxed(L2X0_CTRL_EN, base + L2X0_CTRL);
+ l2c_write_sec(L2X0_CTRL_EN, base, L2X0_CTRL);
}
static void l2x0_resume(void)
@@ -445,7 +460,7 @@ static void l2c210_disable(void)
void __iomem *base = l2x0_base;
outer_flush_all();
- writel_relaxed(0, base + L2X0_CTRL);
+ l2c_write_sec(0, base, L2X0_CTRL);
dsb(st);
}
@@ -930,8 +945,11 @@ static void __init __l2c_init(const struct l2c_init_data *data,
l2x0_size = ways * (data->way_size_0 << way_size_bits);
fns = data->outer_cache;
+ fns.write_sec = outer_cache.write_sec;
if (data->fixup)
data->fixup(l2x0_base, cache_id, &fns);
+ if (fns.write_sec)
+ fns.set_debug = NULL;
/*
* Check if l2x0 controller is already enabled. If we are booting
--
1.8.3.1
next prev parent reply other threads:[~2014-03-17 0:16 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-17 0:13 [PATCH 00/44] outer cache changes Russell King - ARM Linux
2014-03-17 0:13 ` [PATCH 01/44] ARM: l2c: remove outer_inv_all() method Russell King
2014-03-17 0:13 ` [PATCH 02/44] ARM: l2c: remove unnecessary call to outer_flush_all() Russell King
2014-03-17 0:13 ` [PATCH 03/44] ARM: l2c: avoid calling outer_flush_all() unnecessarily (Spear) Russell King
2014-03-17 0:13 ` [PATCH 04/44] ARM: l2c: add helper for L2 cache controller DT IDs Russell King
2014-03-26 20:30 ` Rob Herring
2014-03-17 0:13 ` [PATCH 05/44] ARM: l2c: tidy up l2x0_of_data declarations Russell King
2014-03-17 0:14 ` [PATCH 06/44] ARM: l2c: rename OF specific things, making l2x0_of_data available to all Russell King
2014-03-17 0:14 ` [PATCH 07/44] ARM: l2c: provide generic function for calling set_debug method Russell King
2014-03-17 0:14 ` [PATCH 08/44] ARM: l2c: split out cache unlock code Russell King
2014-03-17 0:14 ` [PATCH 09/44] ARM: l2c: provide generic helper for way-based operations Russell King
2014-03-17 0:14 ` [PATCH 10/44] ARM: l2c: rename cache_wait_way() Russell King
2014-03-17 0:14 ` [PATCH 11/44] ARM: l2c: use add L2C revision constants Russell King
2014-03-17 0:14 ` [PATCH 12/44] ARM: l2c: clean up OF initialisation a bit Russell King
2014-03-17 0:14 ` [PATCH 13/44] ARM: l2c: pass iomem address into data->save function Russell King
2014-03-17 0:14 ` [PATCH 14/44] ARM: l2c: move l2c save function to __l2c_init() Russell King
2014-03-17 0:14 ` [PATCH 15/44] ARM: l2c: provide enable method Russell King
2014-03-17 0:14 ` [PATCH 16/44] ARM: l2c: move aurora broadcast setup to enable function Russell King
2014-03-17 0:14 ` [PATCH 17/44] ARM: l2c: group implementation specific code together Russell King
2014-03-17 0:15 ` [PATCH 18/44] ARM: l2c: implement fixups for L2 cache controller quirks/errata Russell King
2014-03-17 0:15 ` [PATCH 19/44] ARM: l2c: clean up L2 cache initialisation messages Russell King
2014-03-17 0:15 ` [PATCH 20/44] ARM: l2c: split L2C-310 enable function from l2x0 code Russell King
2014-03-17 0:15 ` [PATCH 21/44] ARM: l2c: move and add ARM L2C-2x0/L2C-310 save/resume code to non-OF Russell King
2014-03-17 0:15 ` [PATCH 22/44] ARM: l2c: clean up save/resume functions Russell King
2014-03-17 0:15 ` [PATCH 23/44] ARM: l2c: simplify l2x0 unlocking code Russell King
2014-03-17 0:15 ` [PATCH 24/44] ARM: l2c: move pl310_set_debug() into l2c-310 code Russell King
2014-03-17 0:15 ` [PATCH 25/44] ARM: l2c: add L2C-210 specific handlers Russell King
2014-03-17 0:15 ` [PATCH 26/44] ARM: l2c: implement L2C-310 erratum 727915 as a method override Russell King
2014-03-17 0:15 ` [PATCH 27/44] ARM: l2c: Implement L2C-310 erratum 588369 " Russell King
2014-03-17 0:15 ` [PATCH 28/44] ARM: l2c: use L2C-210 handlers for L2C-310 errata-less implementations Russell King
2014-03-17 0:15 ` [PATCH 29/44] ARM: l2c: add L2C-220 specific handlers Russell King
2014-03-17 0:16 ` [PATCH 30/44] ARM: l2c: remove obsolete l2x0 ops for non-OF init Russell King
2014-03-17 0:16 ` [PATCH 31/44] ARM: l2c: move type string into l2c_init_data structure Russell King
2014-03-17 0:16 ` [PATCH 32/44] ARM: l2c: add decode for L2C-220 cache ways Russell King
2014-03-17 0:16 ` [PATCH 33/44] ARM: l2c: move way size calculation data into l2c_init_data Russell King
2014-03-17 0:16 ` [PATCH 34/44] ARM: outer cache: add documentation of outer cache functions Russell King
2014-03-17 0:16 ` [PATCH 35/44] ARM: outer cache: add WARN_ON() to outer_disable() Russell King
2014-03-17 0:16 ` [PATCH 36/44] ARM: l2c: move errata configuration options to arch/arm/mm/Kconfig Russell King
2014-03-17 0:16 ` Russell King [this message]
2014-03-17 0:16 ` [PATCH 38/44] ARM: l2c: OMAP: implement new write_sec method Russell King
2014-03-17 0:16 ` [PATCH 39/44] ARM: l2c: highbank: " Russell King
2014-03-26 20:35 ` Rob Herring
2014-03-17 0:16 ` [PATCH 40/44] ARM: l2c: ux500: implement dummy " Russell King
2014-03-17 0:17 ` [PATCH 41/44] ARM: l2c: remove old .set_debug method Russell King
2014-03-17 0:17 ` [PATCH 42/44] ARM: l2c: implement L2C-310 erratum 752271 in core L2C code Russell King
2014-03-17 0:17 ` [PATCH 43/44] ARM: l2c: rename all L2C-310 constants with an L310_ prefix Russell King
2014-03-17 0:17 ` [PATCH 44/44] ARM: l2c: add L2C-310 power control DT properties Russell King
2014-03-26 21:08 ` Rob Herring
2014-03-28 13:29 ` Russell King - ARM Linux
2014-03-26 20:05 ` [PATCH 00/44] outer cache changes Gregory CLEMENT
2014-03-28 18:50 ` Nishanth Menon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=E1WPLEO-0002eM-B2@rmk-PC.arm.linux.org.uk \
--to=rmk+kernel@arm$(echo .)linux.org.uk \
--cc=linux-arm-kernel@lists$(echo .)infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox