Re: [PATCH 3/9] dt-bindings: remoteproc: qcom: Add Q6V5 Modem PIL binding

From: Matthias Kaehlcke <mka@chromium•org>
To: Sibi Sankar <sibis@codeaurora•org>
Cc: bjorn.andersson@linaro•org, robh+dt@kernel•org, will@kernel•org,
	saiprakash.ranjan@codeaurora•org, ohad@wizery•com,
	agross@kernel•org, mathieu.poirier@linaro•org,
	robin.murphy@arm•com, joro@8bytes•org, p.zabel@pengutronix•de,
	linux-arm-msm@vger•kernel.org, linux-remoteproc@vger•kernel.org,
	devicetree@vger•kernel.org, linux-kernel@vger•kernel.org,
	linux-arm-kernel@lists•infradead.org, evgreen@chromium•org,
	dianders@chromium•org, swboyd@chromium•org
Subject: Re: [PATCH 3/9] dt-bindings: remoteproc: qcom: Add Q6V5 Modem PIL binding
Date: Fri, 25 Jun 2021 16:43:12 -0700	[thread overview]
Message-ID: <YNZqEJxp9dZUJe5U@google.com> (raw)
In-Reply-To: <1624564058-24095-4-git-send-email-sibis@codeaurora.org>

On Fri, Jun 25, 2021 at 01:17:32AM +0530, Sibi Sankar wrote:
> Add a new modem compatible string for QTI SC7280 SoCs and introduce the
> "qcom,ext-regs" and "qcom,qaccept-regs" bindings needed by the modem
> sub-system running on SC7280 SoCs.
> 
> Signed-off-by: Sibi Sankar <sibis@codeaurora•org>
> ---
>  .../devicetree/bindings/remoteproc/qcom,q6v5.txt   | 32 ++++++++++++++++++++--
>  1 file changed, 30 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> index 494257010629..d802e57701b8 100644
> --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
>
> ...
>
> @@ -208,6 +218,24 @@ For the compatible strings below the following phandle references are required:
>  		    by the offset within syscon for conn_box_spare0 register
>  		    used by the modem sub-system running on SC7180 SoC.
>  
> +For the compatible strings below the following phandle references are required:
> +  "qcom,sc7280-mss-pil"
> +- qcom,ext-regs:
> +	Usage: required
> +	Value type: <prop-encoded-array>
> +	Definition: two phandles reference to syscons representing TCSR_REG and

s/phandles reference/phandle references/

> +		    TCSR register space followed by the two offset within the syscon

s/offset/offsets/

> +		    to force_clk_en/rscc_disable and axim1_clk_off/crypto_clk_off
> +		    registers respectively.

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