From: Andrew Jeffery <andrew@codeconstruct•com.au>
To: Potin Lai <potin.lai.pt@gmail•com>, Rob Herring <robh@kernel•org>,
Krzysztof Kozlowski <krzk+dt@kernel•org>,
Conor Dooley <conor+dt@kernel•org>, Joel Stanley <joel@jms•id.au>,
Patrick Williams <patrick@stwcx•xyz>
Cc: devicetree@vger•kernel.org, linux-arm-kernel@lists•infradead.org,
linux-aspeed@lists•ozlabs.org, linux-kernel@vger•kernel.org,
Cosmo Chou <cosmo.chou@quantatw•com>,
Mike Hsieh <Mike_Hsieh@quantatw•com>,
Potin Lai <potin.lai@quantatw•com>
Subject: Re: [PATCH 2/2] ARM: dts: aspeed: sanmiguel: Fix the CPU_CHIPTHROT linename
Date: Wed, 27 May 2026 12:51:44 +0930 [thread overview]
Message-ID: <a25ff66bee5a2047296eb239c10a7ccafc6d0b30.camel@codeconstruct.com.au> (raw)
In-Reply-To: <20260523-potin-update-sanmiguel-dts-20260522-v1-2-169f5fceb5f9@quantatw.com>
Hi Potin,
On Sat, 2026-05-23 at 10:28 +0800, Potin Lai wrote:
> Fix the GPIO linenames for CPU_CHIPTHROT signals.
>
> The signals were incorrectly marked as output ("-O") while they are
> actually input signals ("-I").
>
> - B0_M0_CPU_CHIPTHROT_L-O -> B0_M0_CPU_CHIPTHROT_L-I
> - B1_M0_CPU_CHIPTHROT_L-O -> B1_M0_CPU_CHIPTHROT_L-I
I dropped this list when applying the patch because it's evident from
the diff.
Andrew
>
> Signed-off-by: Potin Lai <potin.lai@quantatw•com>
> ---
> arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
> index 61dbef45f8b0..d7ed497d7227 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
> @@ -224,7 +224,7 @@ hpm0_ioexp_20: gpio@20 {
> "B0_M0_LEAK_DETECT_ALERT_L-I",
> "B0_M0_RUN_POWER_EN-O",
> "B0_M0_RUN_POWER_PG-I",
> - "B0_M0_CPU_CHIPTHROT_L-O",
> + "B0_M0_CPU_CHIPTHROT_L-I",
> "B0_M0_SHDN_REQ_L-O",
> "B0_M0_CPU_SHDN_OK_L-I",
> "B0_M0_CPLD_READY-I",
> @@ -398,7 +398,7 @@ hpm1_ioexp_20: gpio@20 {
> "B1_M0_LEAK_DETECT_ALERT_L-I",
> "B1_M0_RUN_POWER_EN-O",
> "B1_M0_RUN_POWER_PG-I",
> - "B1_M0_CPU_CHIPTHROT_L-O",
> + "B1_M0_CPU_CHIPTHROT_L-I",
> "B1_M0_SHDN_REQ_L-O",
> "B1_M0_CPU_SHDN_OK_L-I",
> "B1_M0_CPLD_READY-I",
next prev parent reply other threads:[~2026-05-27 3:21 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-23 2:28 [PATCH 0/2] ARM: dts: aspeed: sanmiguel: Update DTS file Potin Lai
2026-05-23 2:28 ` [PATCH 1/2] ARM: dts: aspeed: sanmiguel: Add IOEXP interrupt pin settings Potin Lai
2026-05-27 3:19 ` Andrew Jeffery
2026-05-23 2:28 ` [PATCH 2/2] ARM: dts: aspeed: sanmiguel: Fix the CPU_CHIPTHROT linename Potin Lai
2026-05-27 3:21 ` Andrew Jeffery [this message]
2026-05-27 3:18 ` [PATCH 0/2] ARM: dts: aspeed: sanmiguel: Update DTS file Andrew Jeffery
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