* [PATCH 1/2] ARM: dts: aspeed: sanmiguel: Add IOEXP interrupt pin settings
2026-05-23 2:28 [PATCH 0/2] ARM: dts: aspeed: sanmiguel: Update DTS file Potin Lai
@ 2026-05-23 2:28 ` Potin Lai
2026-05-27 3:19 ` Andrew Jeffery
2026-05-23 2:28 ` [PATCH 2/2] ARM: dts: aspeed: sanmiguel: Fix the CPU_CHIPTHROT linename Potin Lai
2026-05-27 3:18 ` [PATCH 0/2] ARM: dts: aspeed: sanmiguel: Update DTS file Andrew Jeffery
2 siblings, 1 reply; 6+ messages in thread
From: Potin Lai @ 2026-05-23 2:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, Patrick Williams
Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel,
Cosmo Chou, Mike Hsieh, Potin Lai, Potin Lai
Kernel dmesg reports IRQ #44 being disabled due to unhandled
interrupts from multiple PCA953x IO expanders:
```
[ 447.047861] irq 44: nobody cared (try booting with the "irqpoll" option)
[ 447.063124] handlers:
[ 447.068176] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
[ 447.087268] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
[ 447.106344] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
[ 447.125421] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
[ 447.144513] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
[ 447.163587] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
[ 447.182663] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
[ 447.201756] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
[ 447.220837] Disabling IRQ #44
```
The affected IOEXP nodes are missing interrupt pin configuration in
the device tree, causing the interrupt line to remain asserted and
resulting in repeated unhandled IRQ events.
Add the required interrupt-related properties for the affected IOEXP
devices to ensure proper interrupt handling and prevent the IRQ from
being disabled.
Signed-off-by: Potin Lai <potin.lai@quantatw•com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
index 74c8c1772109..61dbef45f8b0 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
@@ -334,6 +334,8 @@ hmc_ioexp: gpio@20 {
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
gpio-line-names =
"", "", "HMC_EROT_FATAL_ERROR_L-I", "",
@@ -552,6 +554,8 @@ smm_ext_ioexp: gpio@38 {
reg = <0x38>;
gpio-controller;
#gpio-cells = <2>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <ASPEED_GPIO(B, 6) IRQ_TYPE_LEVEL_LOW>;
gpio-line-names =
"SSD0_PRSNT_L-I", "E1S_PWR_EN-O",
--
2.52.0
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH 1/2] ARM: dts: aspeed: sanmiguel: Add IOEXP interrupt pin settings
2026-05-23 2:28 ` [PATCH 1/2] ARM: dts: aspeed: sanmiguel: Add IOEXP interrupt pin settings Potin Lai
@ 2026-05-27 3:19 ` Andrew Jeffery
0 siblings, 0 replies; 6+ messages in thread
From: Andrew Jeffery @ 2026-05-27 3:19 UTC (permalink / raw)
To: Potin Lai, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Patrick Williams
Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel,
Cosmo Chou, Mike Hsieh, Potin Lai
Hi Potin,
On Sat, 2026-05-23 at 10:28 +0800, Potin Lai wrote:
> Kernel dmesg reports IRQ #44 being disabled due to unhandled
> interrupts from multiple PCA953x IO expanders:
>
> ```
> [ 447.047861] irq 44: nobody cared (try booting with the "irqpoll" option)
> [ 447.063124] handlers:
> [ 447.068176] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.087268] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.106344] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.125421] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.144513] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.163587] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.182663] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.201756] [<2ab869ad>] irq_default_primary_handler threaded [<b8adc310>] pca953x_irq_handler
> [ 447.220837] Disabling IRQ #44
> ```
I've applied this, but in the future can you please rather indent log
snippets rather than use markdown code-block fences?
Cheers,
Andrew
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/2] ARM: dts: aspeed: sanmiguel: Fix the CPU_CHIPTHROT linename
2026-05-23 2:28 [PATCH 0/2] ARM: dts: aspeed: sanmiguel: Update DTS file Potin Lai
2026-05-23 2:28 ` [PATCH 1/2] ARM: dts: aspeed: sanmiguel: Add IOEXP interrupt pin settings Potin Lai
@ 2026-05-23 2:28 ` Potin Lai
2026-05-27 3:21 ` Andrew Jeffery
2026-05-27 3:18 ` [PATCH 0/2] ARM: dts: aspeed: sanmiguel: Update DTS file Andrew Jeffery
2 siblings, 1 reply; 6+ messages in thread
From: Potin Lai @ 2026-05-23 2:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, Patrick Williams
Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel,
Cosmo Chou, Mike Hsieh, Potin Lai, Potin Lai
Fix the GPIO linenames for CPU_CHIPTHROT signals.
The signals were incorrectly marked as output ("-O") while they are
actually input signals ("-I").
- B0_M0_CPU_CHIPTHROT_L-O -> B0_M0_CPU_CHIPTHROT_L-I
- B1_M0_CPU_CHIPTHROT_L-O -> B1_M0_CPU_CHIPTHROT_L-I
Signed-off-by: Potin Lai <potin.lai@quantatw•com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
index 61dbef45f8b0..d7ed497d7227 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
@@ -224,7 +224,7 @@ hpm0_ioexp_20: gpio@20 {
"B0_M0_LEAK_DETECT_ALERT_L-I",
"B0_M0_RUN_POWER_EN-O",
"B0_M0_RUN_POWER_PG-I",
- "B0_M0_CPU_CHIPTHROT_L-O",
+ "B0_M0_CPU_CHIPTHROT_L-I",
"B0_M0_SHDN_REQ_L-O",
"B0_M0_CPU_SHDN_OK_L-I",
"B0_M0_CPLD_READY-I",
@@ -398,7 +398,7 @@ hpm1_ioexp_20: gpio@20 {
"B1_M0_LEAK_DETECT_ALERT_L-I",
"B1_M0_RUN_POWER_EN-O",
"B1_M0_RUN_POWER_PG-I",
- "B1_M0_CPU_CHIPTHROT_L-O",
+ "B1_M0_CPU_CHIPTHROT_L-I",
"B1_M0_SHDN_REQ_L-O",
"B1_M0_CPU_SHDN_OK_L-I",
"B1_M0_CPLD_READY-I",
--
2.52.0
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH 2/2] ARM: dts: aspeed: sanmiguel: Fix the CPU_CHIPTHROT linename
2026-05-23 2:28 ` [PATCH 2/2] ARM: dts: aspeed: sanmiguel: Fix the CPU_CHIPTHROT linename Potin Lai
@ 2026-05-27 3:21 ` Andrew Jeffery
0 siblings, 0 replies; 6+ messages in thread
From: Andrew Jeffery @ 2026-05-27 3:21 UTC (permalink / raw)
To: Potin Lai, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Patrick Williams
Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel,
Cosmo Chou, Mike Hsieh, Potin Lai
Hi Potin,
On Sat, 2026-05-23 at 10:28 +0800, Potin Lai wrote:
> Fix the GPIO linenames for CPU_CHIPTHROT signals.
>
> The signals were incorrectly marked as output ("-O") while they are
> actually input signals ("-I").
>
> - B0_M0_CPU_CHIPTHROT_L-O -> B0_M0_CPU_CHIPTHROT_L-I
> - B1_M0_CPU_CHIPTHROT_L-O -> B1_M0_CPU_CHIPTHROT_L-I
I dropped this list when applying the patch because it's evident from
the diff.
Andrew
>
> Signed-off-by: Potin Lai <potin.lai@quantatw•com>
> ---
> arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
> index 61dbef45f8b0..d7ed497d7227 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts
> @@ -224,7 +224,7 @@ hpm0_ioexp_20: gpio@20 {
> "B0_M0_LEAK_DETECT_ALERT_L-I",
> "B0_M0_RUN_POWER_EN-O",
> "B0_M0_RUN_POWER_PG-I",
> - "B0_M0_CPU_CHIPTHROT_L-O",
> + "B0_M0_CPU_CHIPTHROT_L-I",
> "B0_M0_SHDN_REQ_L-O",
> "B0_M0_CPU_SHDN_OK_L-I",
> "B0_M0_CPLD_READY-I",
> @@ -398,7 +398,7 @@ hpm1_ioexp_20: gpio@20 {
> "B1_M0_LEAK_DETECT_ALERT_L-I",
> "B1_M0_RUN_POWER_EN-O",
> "B1_M0_RUN_POWER_PG-I",
> - "B1_M0_CPU_CHIPTHROT_L-O",
> + "B1_M0_CPU_CHIPTHROT_L-I",
> "B1_M0_SHDN_REQ_L-O",
> "B1_M0_CPU_SHDN_OK_L-I",
> "B1_M0_CPLD_READY-I",
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 0/2] ARM: dts: aspeed: sanmiguel: Update DTS file
2026-05-23 2:28 [PATCH 0/2] ARM: dts: aspeed: sanmiguel: Update DTS file Potin Lai
2026-05-23 2:28 ` [PATCH 1/2] ARM: dts: aspeed: sanmiguel: Add IOEXP interrupt pin settings Potin Lai
2026-05-23 2:28 ` [PATCH 2/2] ARM: dts: aspeed: sanmiguel: Fix the CPU_CHIPTHROT linename Potin Lai
@ 2026-05-27 3:18 ` Andrew Jeffery
2 siblings, 0 replies; 6+ messages in thread
From: Andrew Jeffery @ 2026-05-27 3:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Patrick Williams, Potin Lai
Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel,
Cosmo Chou, Mike Hsieh, Potin Lai
On Sat, 23 May 2026 10:28:06 +0800, Potin Lai wrote:
> Update the SanMiguel DTS configuration to fix incorrect GPIO
> linenames and resolve the IOEXP interrupt handling issue.
Thanks, I've applied this to the BMC tree.
--
Andrew Jeffery <andrew@codeconstruct•com.au>
^ permalink raw reply [flat|nested] 6+ messages in thread