From: Will Deacon <will@kernel•org>
To: Jason Gunthorpe <jgg@ziepe•ca>
Cc: Ashish Mhetre <amhetre@nvidia•com>,
robin.murphy@arm•com, joro@8bytes•org, nicolinc@nvidia•com,
linux-arm-kernel@lists•infradead.org, iommu@lists•linux.dev,
linux-kernel@vger•kernel.org, linux-tegra@vger•kernel.org
Subject: Re: [PATCH v3 3/3] iommu/arm-smmu-v3: Issue CFGI/TLBI twice on Tegra264
Date: Wed, 3 Jun 2026 12:33:08 +0100 [thread overview]
Message-ID: <aiAQ9ApqfTsdweRg@willie-the-truck> (raw)
In-Reply-To: <20260603010114.GO2487554@ziepe.ca>
On Tue, Jun 02, 2026 at 10:01:14PM -0300, Jason Gunthorpe wrote:
> On Tue, Jun 02, 2026 at 09:22:15PM +0100, Will Deacon wrote:
> > > + /*
> > > + * On Tegra264 (see ARM_SMMU_OPT_TLBI_TWICE) re-issue the same
> > > + * cmdlist with another CMD_SYNC to satisfy the erratum.
> > > + * Callers must ensure the batch carries a uniform opcode class
> > > + * so that checking the first command is enough; the iommufd
> > > + * VSMMU path enforces this with arm_vsmmu_can_batch_cmd().
> > > + */
> > > + if (!ret && sync && arm_smmu_cmd_needs_tlbi_twice(smmu, &cmds[0]))
> >
> > Can you move the arm_smmu_cmd_... part to the start of the conjunction,
> > please? If you make it a static key as I mentioned previously, then
> > hopefully that should mean everything else is moved out of line.
> >
> > > + ret = __arm_smmu_cmdq_issue_cmdlist(smmu, cmdq, cmds, n, sync);
> >
> > Sashiko is also unhappy here if n == 0 because we probably shouldn't
> > be inspecting the command array in that case.
>
> That seems like an AI mistake though, we shouldn't actually ever pass
> in 0 sized batches? 'zero streams' should fail probe, not get into
> this code, that might be missing but I wouldn't add checks here..
I was wondering about the case where the first command in a batch is
unsupported. Can we issue a bare sync in that case?
Will
next prev parent reply other threads:[~2026-06-03 11:33 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-01 10:48 [PATCH v3 0/3] iommu/arm-smmu-v3: Tegra264 invalidation workaround Ashish Mhetre
2026-06-01 10:48 ` [PATCH v3 1/3] iommu/arm-smmu-v3: Factor out CMDQ batch force-sync conditions Ashish Mhetre
2026-06-02 19:55 ` Will Deacon
2026-06-02 20:08 ` Nicolin Chen
2026-06-02 20:23 ` Will Deacon
2026-06-01 10:48 ` [PATCH v3 2/3] iommu/arm-smmu-v3: Detect Tegra264 erratum Ashish Mhetre
2026-06-02 20:13 ` Will Deacon
2026-06-02 20:31 ` Nicolin Chen
2026-06-02 20:59 ` Will Deacon
2026-06-02 21:06 ` Nicolin Chen
2026-06-01 10:48 ` [PATCH v3 3/3] iommu/arm-smmu-v3: Issue CFGI/TLBI twice on Tegra264 Ashish Mhetre
2026-06-01 18:37 ` Nicolin Chen
2026-06-02 20:22 ` Will Deacon
2026-06-02 20:35 ` Nicolin Chen
2026-06-03 0:59 ` Jason Gunthorpe
2026-06-03 1:01 ` Jason Gunthorpe
2026-06-03 11:33 ` Will Deacon [this message]
2026-06-02 16:31 ` [PATCH v3 0/3] iommu/arm-smmu-v3: Tegra264 invalidation workaround Mostafa Saleh
2026-06-02 18:23 ` Jason Gunthorpe
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