From: Stephen Rothwell <sfr@canb•auug.org.au>
To: Christoffer Dall <cdall@cs•columbia.edu>,
Marc Zyngier <maz@kernel•org>,
Catalin Marinas <catalin.marinas@arm•com>,
Will Deacon <will@kernel•org>
Cc: Linux Kernel Mailing List <linux-kernel@vger•kernel.org>,
Linux Next Mailing List <linux-next@vger•kernel.org>,
Mark Rutland <mark.rutland@arm•com>,
Oliver Upton <oliver.upton@linux•dev>,
Shameer Kolothum <shameerali.kolothum.thodi@huawei•com>
Subject: linux-next: manual merge of the kvm-arm tree with the arm64 tree
Date: Mon, 17 Mar 2025 17:04:04 +1100 [thread overview]
Message-ID: <20250317170404.733b119c@canb.auug.org.au> (raw)
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Hi all,
Today's linux-next merge of the kvm-arm tree got a conflict in:
arch/arm64/kernel/cpufeature.c
between commits:
f4fe70cd8522 ("arm64: cpufeature: factor out cpu_is_meltdown_safe()")
837dfd070e94 ("arm64: cpufeature: mitigate CVE-2024-7881")
from the arm64 tree and commit:
e3121298c7fc ("arm64: Modify _midr_range() functions to read MIDR/REVIDR internally")
from the kvm-arm tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
--
Cheers,
Stephen Rothwell
diff --cc arch/arm64/kernel/cpufeature.c
index f5ca9a535eba,9c4d6d552b25..000000000000
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@@ -1787,63 -1791,15 +1789,63 @@@ static bool cpu_is_meltdown_safe(void
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
{ /* sentinel */ }
};
+
- if (is_midr_in_range_list(read_cpuid_id(), meltdown_safe_list))
++ if (is_midr_in_range_list(meltdown_safe_list))
+ return true;
+
+ /*
+ * ID_AA64PFR0_EL1.CSV3 > 0 indicates that this CPU is not vulnerable
+ * to meltdown.
+ */
+ pfr0 = __read_sysreg_by_encoding(SYS_ID_AA64PFR0_EL1);
+ if (cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL1_CSV3_SHIFT))
+ return true;
+
+ return false;
+}
+
+static bool cpu_has_leaky_prefetcher(void)
+{
+ struct arm_smccc_res res;
+
+ /* CPUs which are affected by CVE-2024-7881 */
+ static const struct midr_range leaky_prefetcher_list[] = {
+ MIDR_ALL_VERSIONS(MIDR_CORTEX_X3),
+ MIDR_ALL_VERSIONS(MIDR_CORTEX_X4),
+ MIDR_ALL_VERSIONS(MIDR_CORTEX_X925),
+ MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),
+ MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),
+ { /* sentinel */ }
+ };
+
- if (!is_midr_in_range_list(read_cpuid_id(), leaky_prefetcher_list))
++ if (!is_midr_in_range_list(leaky_prefetcher_list))
+ return false;
+
+ /*
+ * If ARCH_WORKAROUND_4 is implemented, then the firmware mitigation is
+ * present. There is no need to call ARCH_WORKAROUND_4 itself.
+ */
+ arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
+ ARM_SMCCC_ARCH_WORKAROUND_4, &res);
+ if (res.a0 == SMCCC_RET_SUCCESS)
+ return false;
+
+ return true;
+}
+
+static bool __meltdown_safe = true;
+static bool __leaky_prefetch_safe = true;
+static int __kpti_forced; /* 0: not forced, >0: forced on, <0: forced off */
+
+static bool needs_kpti(const struct arm64_cpu_capabilities *entry, int scope)
+{
char const *str = "kpti command line option";
bool meltdown_safe;
+ bool prefetcher_safe;
- meltdown_safe = is_midr_in_range_list(kpti_safe_list);
-
- /* Defer to CPU feature registers */
- if (has_cpuid_feature(entry, scope))
- meltdown_safe = true;
+ WARN_ON(scope != SCOPE_LOCAL_CPU);
+ meltdown_safe = cpu_is_meltdown_safe();
if (!meltdown_safe)
__meltdown_safe = false;
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next reply other threads:[~2025-03-17 6:04 UTC|newest]
Thread overview: 96+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-17 6:04 Stephen Rothwell [this message]
-- strict thread matches above, loose matches on Subject: below --
2025-03-17 6:21 linux-next: manual merge of the kvm-arm tree with the arm64 tree Stephen Rothwell
2025-03-17 11:08 ` Marc Zyngier
2025-03-17 14:22 ` Will Deacon
2025-03-17 6:17 Stephen Rothwell
2025-03-21 4:29 ` Stephen Rothwell
2025-01-06 3:53 Stephen Rothwell
2025-01-06 9:40 ` Marc Zyngier
2024-10-31 3:35 Stephen Rothwell
2024-11-15 4:05 ` Stephen Rothwell
2024-09-05 6:08 Stephen Rothwell
2024-09-05 8:15 ` Marc Zyngier
2024-09-16 6:47 ` Stephen Rothwell
2024-03-08 1:54 Stephen Rothwell
2024-03-08 6:25 ` Oliver Upton
2024-03-08 12:30 ` Catalin Marinas
2024-03-08 1:47 Stephen Rothwell
2024-02-20 2:21 Stephen Rothwell
2024-02-19 2:58 Stephen Rothwell
2024-02-19 12:14 ` Catalin Marinas
2024-02-19 15:22 ` Marc Zyngier
2024-02-19 15:35 ` Mark Rutland
2024-02-19 15:43 ` Ard Biesheuvel
2024-02-19 16:49 ` Catalin Marinas
2023-10-24 2:28 Stephen Rothwell
2023-10-24 6:49 ` Oliver Upton
2023-10-17 1:30 Stephen Rothwell
2023-10-17 11:13 ` Catalin Marinas
2023-10-18 23:02 ` Oliver Upton
2023-11-01 2:36 ` Stephen Rothwell
2023-06-15 2:45 Stephen Rothwell
2023-06-15 7:37 ` Oliver Upton
2023-06-15 8:32 ` Catalin Marinas
2023-06-15 2:22 Stephen Rothwell
2023-06-15 7:14 ` Catalin Marinas
2023-07-03 0:50 ` Stephen Rothwell
2023-06-06 1:49 Stephen Rothwell
2023-06-06 9:20 ` Catalin Marinas
2023-06-07 1:05 ` Stephen Rothwell
2023-06-07 5:33 ` Oliver Upton
2023-06-07 8:45 ` Catalin Marinas
2023-02-06 1:44 Stephen Rothwell
2023-02-06 4:21 ` Stephen Rothwell
2023-02-06 8:37 ` Marc Zyngier
2023-02-06 8:43 ` Marc Zyngier
2022-09-19 4:05 Stephen Rothwell
2022-09-19 9:04 ` Marc Zyngier
2022-09-23 10:26 ` Catalin Marinas
2022-05-04 4:35 Stephen Rothwell
2022-05-04 7:06 ` Marc Zyngier
2022-05-04 8:08 ` Catalin Marinas
2022-05-23 6:36 ` Stephen Rothwell
2021-08-19 4:05 Stephen Rothwell
2021-08-20 9:27 ` Catalin Marinas
2021-08-12 3:33 Stephen Rothwell
2021-06-23 5:58 Stephen Rothwell
2021-04-13 5:43 Stephen Rothwell
2021-04-13 11:21 ` Ard Biesheuvel
2021-01-27 5:24 Stephen Rothwell
2020-12-04 5:44 Stephen Rothwell
2020-12-04 11:12 ` Marc Zyngier
2020-12-04 5:17 Stephen Rothwell
2020-09-30 6:26 Stephen Rothwell
2020-05-29 7:00 Stephen Rothwell
2019-07-08 7:24 Stephen Rothwell
2018-10-04 4:22 Stephen Rothwell
2018-10-04 4:07 Stephen Rothwell
2018-07-23 4:46 Stephen Rothwell
2018-07-23 10:45 ` Marc Zyngier
2018-08-16 0:15 ` Stephen Rothwell
2018-08-17 8:32 ` Paolo Bonzini
2018-08-17 9:33 ` Marc Zyngier
2018-06-01 6:23 Stephen Rothwell
2018-06-01 8:23 ` Marc Zyngier
2018-06-01 6:13 Stephen Rothwell
2018-03-28 5:05 Stephen Rothwell
2018-03-29 5:16 ` Stephen Rothwell
2018-03-28 5:00 Stephen Rothwell
2018-03-28 11:53 ` Will Deacon
2017-08-25 4:57 Stephen Rothwell
2017-08-25 8:11 ` Marc Zyngier
2017-08-25 8:44 ` Christoffer Dall
2016-02-29 5:18 Stephen Rothwell
2016-02-24 2:38 Stephen Rothwell
2016-02-22 2:33 Stephen Rothwell
2016-02-22 9:26 ` Catalin Marinas
2016-02-22 2:28 Stephen Rothwell
2016-02-22 9:24 ` Catalin Marinas
2016-02-12 2:26 Stephen Rothwell
2015-01-22 5:07 Stephen Rothwell
2015-01-22 8:51 ` Marc Zyngier
2015-01-22 10:29 ` Mark Rutland
2015-01-22 23:05 ` Stephen Rothwell
2015-01-23 1:36 ` Wei Huang
2015-01-23 11:53 ` Christoffer Dall
2015-01-22 5:06 Stephen Rothwell
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