From: Scott Wood <scottwood@freescale•com>
To: Liu Po-B43644 <B43644@freescale•com>
Cc: Wood Scott-B07421 <B07421@freescale•com>,
Hu Mingkai-B21284 <B21284@freescale•com>,
"linuxppc-dev@ozlabs•org" <linuxppc-dev@ozlabs•org>
Subject: Re: [1/4] powerpc/85xx: Add SEC6.0 device tree
Date: Tue, 23 Jul 2013 18:24:14 -0500 [thread overview]
Message-ID: <1374621854.15592.44@snotra> (raw)
In-Reply-To: <D473A0D087F4EA47A30C37E4637E25E609DAD274@039-SN2MPN1-021.039d.mgd.msft.net> (from B43644@freescale.com on Tue Jul 23 03:01:17 2013)
On 07/23/2013 03:01:17 AM, Liu Po-B43644 wrote:
>=20
> > -----Original Message-----
> > From: Wood Scott-B07421
> > Sent: Tuesday, July 23, 2013 6:41 AM
> > To: Liu Po-B43644
> > Cc: linuxppc-dev@ozlabs•org; Hu Mingkai-B21284
> > Subject: Re: [1/4] powerpc/85xx: Add SEC6.0 device tree
> >
> > On Thu, Apr 25, 2013 at 09:54:14AM +0800, Po Liu wrote:
> > > From: Mingkai Hu <Mingkai.Hu@freescale•com>
> > >
> > > Add device tree for SEC 6.0 used on C29x silicon.
> > >
> > > Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale•com>
> > > Singed-off-by: Po Liu <Po.Liu@freescale•com>
> >
> > I've heard of patches being flamed, but here we want signing, not
> > singeing. :-)
> >
> > Don't forget that you can use the -s option to have git add the =20
> signoff
> > for you.
> >
> > > ---
> > > Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git
> >
> > This URL is not accessible outside Freescale, so don't reference =20
> it when
> > posting patches publicly.
> >
> > If your patch is against the latest upstream code, you don't need =20
> to say
> > anything special about that. You only need to make a note when =20
> it's
> > against some other yet-to-be-merged tree or patch.
> >
> > > + compatible =3D "fsl,sec-v6.0", "fsl,sec-v5.2",
> > > + "fsl,sec-v5.0", "fsl,sec-v4.4",
> > > + "fsl,sec-v4.0";
> > > + fsl,sec-era =3D <6>;
> > > + #address-cells =3D <1>;
> > > + #size-cells =3D <1>;
> > > +
> > > + jr@1000 {
> > > + compatible =3D "fsl,sec-v6.0-job-ring",
> > > + "fsl,sec-v5.2-job-ring",
> > > + "fsl,sec-v5.0-job-ring",
> > > + "fsl,sec-v4.4-job-ring",
> > > + "fsl,sec-v4.0-job-ring";
> > > + reg =3D <0x1000 0x1000>;
> > > + };
> > > +
> > > + jr@2000 {
> > > + compatible =3D "fsl,sec-v6.0-job-ring",
> > > + "fsl,sec-v5.2-job-ring",
> > > + "fsl,sec-v5.0-job-ring",
> > > + "fsl,sec-v4.4-job-ring",
> > > + "fsl,sec-v4.0-job-ring";
> > > + reg =3D <0x2000 0x1000>;
> > > + };
> >
> > You claim compatibility with a bunch of prior SECs, but sec-v5.2 =20
> has four
> > job rings and an rtic node. Likewise for the previous compatibles =20
> listed.
> > This has two job rings and no rtic.
> So, shall I remove "fsl,sec-v5.2","fsl,sec-v5.0", "fsl,sec-v4.4", =20
> "fsl,sec-v4.0" since all other SEC with 4 job rings? and only leave =20
> "fsl,sec-v6.0"?
Yes, I think so.
> > Can you point to where in the SEC v4.0 binding (I don't see a =20
> binding for
> > the subsequent versions), it says that these are optional?
> I found SEC V4.0 in file qoriq-sec4.0-0.dtsi. If "fsl,sec-v4.0" not =20
> in the compatible list, it is no use in this compatible list. But =20
> seems keep the "fsl,sec-v4.0-job-ring" job ring compatible is ok. Is =20
> that what you were ask?
No, I was talking about binding documents:
Documentation/devicetree/bindings/crypto/
-Scott=
prev parent reply other threads:[~2013-07-23 23:24 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-25 1:54 [PATCH 1/4] powerpc/85xx: Add SEC6.0 device tree Po Liu
2013-04-25 1:54 ` [PATCH 2/4] powerpc/85xx: Add silicon device tree for C293 Po Liu
2013-04-25 1:54 ` [PATCH 3/4] powerpc/85xx: Add C293PCIE board support Po Liu
2013-07-22 22:58 ` [3/4] " Scott Wood
2013-07-23 7:47 ` Liu Po-B43644
2013-07-23 16:22 ` Scott Wood
2013-04-25 1:54 ` [PATCH 4/4] powerpc/85xx: Update mpc85xx_defconfig for C293PCIE Po Liu
2013-07-22 22:59 ` [4/4] " Scott Wood
2013-07-22 23:00 ` Scott Wood
2013-07-23 7:13 ` Liu Po-B43644
2013-07-26 2:41 ` [PATCH v2 1/3] powerpc/85xx: Add SEC6.0 device tree Po Liu
2013-07-26 2:41 ` [PATCH v2 2/3] powerpc/85xx: Add silicon device tree for C293 Po Liu
2013-07-26 2:41 ` [PATCH v2 3/3] powerpc/85xx: Add C293PCIE board support Po Liu
2013-07-26 21:59 ` Scott Wood
2013-07-29 2:20 ` Liu Po-B43644
2013-07-29 18:10 ` Scott Wood
2013-07-30 8:49 ` [PATCH v3 1/3] powerpc/85xx: Add SEC6.0 device tree Po Liu
2013-07-30 8:49 ` [PATCH v3 2/3] powerpc/85xx: Add silicon device tree for C293 Po Liu
2013-07-30 18:28 ` Scott Wood
2013-07-31 2:13 ` Liu Po-B43644
2013-07-31 15:46 ` Scott Wood
2013-08-01 2:32 ` Liu Po-B43644
2013-08-07 23:24 ` Scott Wood
2013-07-30 8:49 ` [PATCH v3 3/3] powerpc/85xx: Add C293PCIE board support Po Liu
2013-07-30 18:29 ` Scott Wood
2013-08-02 6:39 ` [PATCH v4 1/3] powerpc/85xx: Add SEC6.0 device tree Po Liu
2013-08-02 6:39 ` [PATCH v4 2/3] powerpc/85xx: Add silicon device tree for C293 Po Liu
2013-08-02 6:39 ` [PATCH v4 3/3] powerpc/85xx: Add C293PCIE board support Po Liu
2013-07-26 21:55 ` [PATCH v2 1/3] powerpc/85xx: Add SEC6.0 device tree Scott Wood
2013-07-29 2:14 ` Liu Po-B43644
2013-07-22 22:41 ` [1/4] " Scott Wood
2013-07-23 8:01 ` Liu Po-B43644
2013-07-23 23:24 ` Scott Wood [this message]
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