From: Segher Boessenkool <segher@kernel•crashing.org>
To: Vladislav Buzov <vbuzov@ru•mvista.com>
Cc: linuxppc-dev list <linuxppc-dev@ozlabs•org>
Subject: Re: [RFC/PATCH] powerpc: MPC7450 L2 HW cache flush feature utilization
Date: Sat, 23 Jun 2007 17:46:01 +0200 [thread overview]
Message-ID: <3372b921591ca9731d2703f04e6c35f1@kernel.crashing.org> (raw)
In-Reply-To: <467BE91F.1030003@ru.mvista.com>
> Note that 745x processors have L3 cache installed and may have the same
> problem requiring similar code modifications to use L3 hardware
> flushing
> mechanism.
What does the erratum say?
The L3 is a very different beast from the L2, IIRC it is
a pure victim cache so it cannot have this problem at all?
Segher
next prev parent reply other threads:[~2007-06-23 15:46 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-06-13 10:19 [RFC/PATCH] powerpc: MPC7450 L2 HW cache flush feature utilization Vladislav Buzov
2007-06-14 13:56 ` Segher Boessenkool
2007-06-14 17:12 ` Vladislav Buzov
2007-06-14 22:26 ` Mark A. Greer
2007-06-15 8:16 ` Segher Boessenkool
2007-06-15 8:55 ` Vladislav D. Buzov
2007-06-15 9:01 ` Segher Boessenkool
2007-06-15 9:33 ` Vladislav D. Buzov
2007-06-15 10:44 ` Segher Boessenkool
2007-06-15 8:14 ` Segher Boessenkool
2007-06-15 8:42 ` Vladislav D. Buzov
2007-06-15 8:56 ` Segher Boessenkool
2007-06-15 21:20 ` Mark A. Greer
2007-06-15 22:14 ` Segher Boessenkool
2007-06-21 12:37 ` Benjamin Herrenschmidt
2007-06-22 15:22 ` Vladislav Buzov
2007-06-23 15:46 ` Segher Boessenkool [this message]
2007-06-25 14:09 ` Vladislav Buzov
2007-06-28 8:24 ` Segher Boessenkool
2007-06-28 9:13 ` Benjamin Herrenschmidt
2007-06-28 10:47 ` Vladislav Buzov
2007-06-28 11:09 ` Benjamin Herrenschmidt
2007-06-25 19:00 ` Vladislav Buzov
2007-06-28 8:35 ` Segher Boessenkool
2007-06-29 10:41 ` Vladislav Buzov
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