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From: patchwork-bot+netdevbpf@kernel•org
To: Russell King (Oracle) <rmk+kernel@armlinux•org.uk>
Cc: andrew@lunn•ch, hkallweit1@gmail•com, linus.walleij@linaro•org,
	alsi@bang-olufsen•dk, f.fainelli@gmail•com, olteanv@gmail•com,
	davem@davemloft•net, edumazet@google•com, kuba@kernel•org,
	pabeni@redhat•com, netdev@vger•kernel.org
Subject: Re: [PATCH net-next] net: dsa: realtek: add phylink_get_caps implementation
Date: Sun, 20 Aug 2023 10:49:27 +0000	[thread overview]
Message-ID: <169252856777.3170.269285332063521836.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <E1qXJrG-005Oey-10@rmk-PC.armlinux.org.uk>

Hello:

This patch was applied to netdev/net-next.git (main)
by David S. Miller <davem@davemloft•net>:

On Sat, 19 Aug 2023 12:11:06 +0100 you wrote:
> The user ports use RSGMII, but we don't have that, and DT doesn't
> specify a phy interface mode, so phylib defaults to GMII. These support
> 1G, 100M and 10M with flow control. It is unknown whether asymetric
> pause is supported at all speeds.
> 
> The CPU port uses MII/GMII/RGMII/REVMII by hardware pin strapping,
> and support speeds specific to each, with full duplex only supported
> in some modes. Flow control may be supported again by hardware pin
> strapping, and theoretically is readable through a register but no
> information is given in the datasheet for that.
> 
> [...]

Here is the summary with links:
  - [net-next] net: dsa: realtek: add phylink_get_caps implementation
    https://git.kernel.org/netdev/net-next/c/b22eef6864ca

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



      parent reply	other threads:[~2023-08-20 10:49 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-19 11:11 [PATCH net-next] net: dsa: realtek: add phylink_get_caps implementation Russell King (Oracle)
2023-08-19 13:21 ` Vladimir Oltean
2023-08-19 14:33 ` Linus Walleij
2023-08-20 10:49 ` patchwork-bot+netdevbpf [this message]

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