* [PATCH 1/7] Topcliff GbE: Add The Main code [1/3]
@ 2010-04-23 11:56 Masayuki Ohtake
2010-04-23 15:26 ` Stephen Hemminger
0 siblings, 1 reply; 3+ messages in thread
From: Masayuki Ohtake @ 2010-04-23 11:56 UTC (permalink / raw)
To: NETDEV; +Cc: Wang, Yong Y, Wang, Qi, Intel OTC, Andrew
[-- Attachment #1: Type: message/partial, Size: 39156 bytes --]
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH 1/7] Topcliff GbE: Add The Main code [1/3]
2010-04-23 11:56 [PATCH 1/7] Topcliff GbE: Add The Main code [1/3] Masayuki Ohtake
@ 2010-04-23 15:26 ` Stephen Hemminger
2010-04-26 8:00 ` Masayuki Ohtake
0 siblings, 1 reply; 3+ messages in thread
From: Stephen Hemminger @ 2010-04-23 15:26 UTC (permalink / raw)
To: Masayuki Ohtake; +Cc: NETDEV, Wang, Yong Y, Wang, Qi, Intel OTC, Andrew
On Fri, 23 Apr 2010 20:56:25 +0900
"Masayuki Ohtake" <masa-korg@dsn•okisemi.com> wrote:
Even though the patch was sent as an attachment, long lines were
wrapped.
Do you want this to go directly to kernel, or do you want help
fixing coding issues by submitting to staging tree?
The code uses a comment style that is kind of like the existing
docbook comment style; why not convert it to use the official
docbook style for examples look at other kernel code:
/**
* dev_alloc_skb - allocate an skbuff for receiving
* @length: length to allocate
*
* Allocate a new &sk_buff and assign it a usage count of one. The
* buffer has unspecified headroom built in. Users should allocate
* the headroom they think they need without accounting for the
* built in space. The built in space is used for optimisations.
*
* %NULL is returned if there is no free memory. Although this function
* allocates memory it can be called from an interrupt.
*/
The code is also indented with a non-standard indentation format.
Please read Documentation/CodingStyle. Indentation is supposed
to be 4 characters (and using tabs of 8 characters).
The PCI device table could be changed to:
static DEFINE_PCI_DEVICE_TABLE(pch_gbe_pcidev_id) = {
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOH1_GBE) },
{ 0 }
};
Also PCI_DEVICE_ID_INTEL_IOH1_GBE is not defined anywhere I can see.
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH 1/7] Topcliff GbE: Add The Main code [1/3]
2010-04-23 15:26 ` Stephen Hemminger
@ 2010-04-26 8:00 ` Masayuki Ohtake
0 siblings, 0 replies; 3+ messages in thread
From: Masayuki Ohtake @ 2010-04-26 8:00 UTC (permalink / raw)
To: Stephen Hemminger; +Cc: NETDEV, Wang, Yong Y, Wang, Qi, Intel OTC, Andrew
On: Fri, 23 Apr 2010 08:26:24 -0700, Stephen Hemminger
<shemminger@vyatta•com> wrote.
Hi Stephen
Thank you for your review.
We will confirm them and update the new patch.
Our company have a vacation.
Therefore we will update patch after May 6.
Best regards,
Masayuki Ohtake <masa-korg@dsn•okisemi.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2010-04-23 11:56 [PATCH 1/7] Topcliff GbE: Add The Main code [1/3] Masayuki Ohtake
2010-04-23 15:26 ` Stephen Hemminger
2010-04-26 8:00 ` Masayuki Ohtake
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