From: Andrew Lunn <andrew@lunn•ch>
To: Florian Fainelli <f.fainelli@gmail•com>
Cc: netdev@vger•kernel.org, davem@davemlof•net,
vivien.didelot@savoirfairelinux•com
Subject: Re: [PATCH net-next v2 5/5] net: dsa: bcm_sf2: Register our slave MDIO bus
Date: Tue, 7 Jun 2016 02:39:58 +0200 [thread overview]
Message-ID: <20160607003958.GQ12165@lunn.ch> (raw)
In-Reply-To: <1465254895-11152-6-git-send-email-f.fainelli@gmail.com>
On Mon, Jun 06, 2016 at 04:14:55PM -0700, Florian Fainelli wrote:
> Register a slave MDIO bus which allows us to divert problematic
> read/writes towards conflicting pseudo-PHY address (30). Do no longer
> rely on DSA's slave_mii_bus, but instead provide our own implementation
> which offers more flexibility as to what to do, and when to register it.
>
> We need to register it by the time we are able to get access to our
> memory mapped registers, which is not until drv->setup() time. In order
> to avoid forward declarations, we need to re-order the function bodies a
> bit.
>
> Signed-off-by: Florian Fainelli <f.fainelli@gmail•com>
Reviewed-by: Andrew Lunn <andrew@lunn•ch>
Andrew
next prev parent reply other threads:[~2016-06-07 0:40 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-06 23:14 [PATCH net-next v2 0/5] net: dsa: misc improvements Florian Fainelli
2016-06-06 23:14 ` [PATCH net-next v2 1/5] net: dsa: Provide unique DSA slave MII bus names Florian Fainelli
2016-06-06 23:14 ` [PATCH net-next v2 2/5] net: dsa: Initialize ds->enabled_port_mask and ds->phys_mii_mask Florian Fainelli
2016-06-07 0:22 ` Andrew Lunn
2016-06-07 13:05 ` Andrew Lunn
2016-06-06 23:14 ` [PATCH net-next v2 3/5] net: dsa: Add initialization helper for CPU port ethtool_ops Florian Fainelli
2016-06-07 13:05 ` Vivien Didelot
2016-06-06 23:14 ` [PATCH net-next v2 4/5] net: dsa: Initialize CPU port ethtool ops per tree Florian Fainelli
2016-06-07 0:34 ` Andrew Lunn
2016-06-06 23:14 ` [PATCH net-next v2 5/5] net: dsa: bcm_sf2: Register our slave MDIO bus Florian Fainelli
2016-06-07 0:39 ` Andrew Lunn [this message]
2016-06-07 13:23 ` Vivien Didelot
2016-06-07 14:46 ` Vivien Didelot
2016-06-07 16:48 ` Vivien Didelot
2016-06-07 17:00 ` Andrew Lunn
2016-06-07 17:33 ` Vivien Didelot
2016-06-07 18:44 ` Andrew Lunn
2016-06-07 19:11 ` Vivien Didelot
2016-06-07 19:29 ` Florian Fainelli
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