From: Andrew Lunn <andrew@lunn•ch>
To: Vivien Didelot <vivien.didelot@savoirfairelinux•com>
Cc: David Miller <davem@davemloft•net>, netdev <netdev@vger•kernel.org>
Subject: Re: [PATCH net-next 1/8] net: dsa: mv88e6xxx: Implement external MDIO bus on mv88e6390
Date: Sat, 21 Jan 2017 17:15:32 +0100 [thread overview]
Message-ID: <20170121161532.GB7808@lunn.ch> (raw)
In-Reply-To: <878tq5ffcc.fsf@weeman.i-did-not-set--mail-host-address--so-tickle-me>
On Fri, Jan 20, 2017 at 07:04:35PM -0500, Vivien Didelot wrote:
> Hi Andrew,
>
> Andrew Lunn <andrew@lunn•ch> writes:
>
> > The mv88e6390 has two MDIO busses. The internal MDIO bus is used for
> > the internal PHYs. The external MDIO can be used for external PHYs.
> > The external MDIO bus will be instantiated if there is an
> > "mdio-external" node in the device tree.
>
> Thanks for pushing the 88E6390 support. Some comments below.
>
> > +static int mv88e6xxx_read_phy(struct mv88e6xxx_chip *chip, int addr, int reg,
> > +static int mv88e6xxx_write_phy(struct mv88e6xxx_chip *chip, int addr, int reg,
> > static int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy,
> > static int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy,
>
> Adding mv88e6xxx_read/write_phy() in addition to existing
> mv88e6xxx_phy_read/write() feels really confusing and hard to
> maintain. Can that be done the other way around maybe?
Yes, i agree. I didn't particularly like it either. What might be
simpler is to pass the struct mii_bus all the way down, where as we
only currently have chip.
Andrew
next prev parent reply other threads:[~2017-01-21 16:16 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-20 23:30 [net-next 0/8] More MV88E6390 patches Andrew Lunn
2017-01-20 23:30 ` [PATCH net-next 1/8] net: dsa: mv88e6xxx: Implement external MDIO bus on mv88e6390 Andrew Lunn
2017-01-21 0:01 ` Florian Fainelli
2017-01-21 16:07 ` Andrew Lunn
2017-01-21 0:04 ` Vivien Didelot
2017-01-21 16:15 ` Andrew Lunn [this message]
2017-01-20 23:30 ` [PATCH net-next 2/8] net: phy: Add 2000base-x, 2500base-x and rxaui modes Andrew Lunn
2017-01-21 0:07 ` Florian Fainelli
2017-01-20 23:30 ` [PATCH net-next 3/8] net: dsa: mv88e6xxx: Fix ATU age timer for MV88E6390 Andrew Lunn
2017-01-21 0:10 ` Vivien Didelot
2017-01-20 23:30 ` [PATCH net-next 4/8] net: dsa: mv88e6xxx: Set the CMODE for mv88e6390 ports 9 & 10 Andrew Lunn
2017-01-21 0:20 ` Vivien Didelot
2017-01-20 23:30 ` [PATCH net-next 5/8] net: dsa: mv88e6xxx: Workaround missing PHY ID on mv88e6390 Andrew Lunn
2017-01-21 0:03 ` Florian Fainelli
2017-01-21 0:26 ` Vivien Didelot
2017-01-24 21:00 ` Gregory CLEMENT
2017-01-20 23:31 ` [PATCH net-next 6/8] net: phy: Marvell: Add mv88e6390 internal PHY Andrew Lunn
2017-01-21 0:04 ` Florian Fainelli
2017-01-20 23:31 ` [PATCH net-next 7/8] net: dsa: mv88e6xxx: Implement Clause 45 access to SMI devices Andrew Lunn
2017-01-20 23:31 ` [PATCH net-next 8/8] net: dsa: mv88e6xxx: Fix typ0 when configuring 2.5Gbps Andrew Lunn
2017-01-21 0:53 ` Vivien Didelot
2017-01-23 18:06 ` [net-next 0/8] More MV88E6390 patches David Miller
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