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From: Gregory CLEMENT <gregory.clement@free-electrons•com>
To: Vivien Didelot <vivien.didelot@savoirfairelinux•com>
Cc: Andrew Lunn <andrew@lunn•ch>, David Miller <davem@davemloft•net>,
	netdev <netdev@vger•kernel.org>
Subject: Re: [PATCH net-next 5/8] net: dsa: mv88e6xxx: Workaround missing PHY ID on mv88e6390
Date: Tue, 24 Jan 2017 22:00:10 +0100	[thread overview]
Message-ID: <87a8ag2mxx.fsf@free-electrons.com> (raw)
In-Reply-To: <87ziildzrc.fsf@weeman.i-did-not-set--mail-host-address--so-tickle-me> (Vivien Didelot's message of "Fri, 20 Jan 2017 19:26:31 -0500")

Hi Vivien,
 
 On sam., janv. 21 2017, Vivien Didelot <vivien.didelot@savoirfairelinux•com> wrote:

> Hi Andrew,
>
> Andrew Lunn <andrew@lunn•ch> writes:
>
>> The internal PHYs of the mv88e6390 do not have a model ID. Trap any
>> calls to the ID register, and if it is zero, return the ID for the
>> mv88e6390. The Marvell PHY driver can then bind to this ID.
>
> This, in addition to the temperature code not working (despite what the
> datasheet says) makes me wonder if this is intentional from Marvell. Do
> we have a revision number for the 88E6390X's on the ZII Dev Rev C board?
>
> It would be interesting to ask Gregory maybe about that. This looks not
> "production-ready".

What I can say is that with the 88E6341, which seems to have the same
issue (ie incomplete PHY ID), reading the temperature worked.

Gregory

>
> Other than that, I have no objection on the patch itself if that is
> indeed expected from them...
>
> Thanks,
>
>         Vivien

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

  reply	other threads:[~2017-01-24 21:00 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-20 23:30 [net-next 0/8] More MV88E6390 patches Andrew Lunn
2017-01-20 23:30 ` [PATCH net-next 1/8] net: dsa: mv88e6xxx: Implement external MDIO bus on mv88e6390 Andrew Lunn
2017-01-21  0:01   ` Florian Fainelli
2017-01-21 16:07     ` Andrew Lunn
2017-01-21  0:04   ` Vivien Didelot
2017-01-21 16:15     ` Andrew Lunn
2017-01-20 23:30 ` [PATCH net-next 2/8] net: phy: Add 2000base-x, 2500base-x and rxaui modes Andrew Lunn
2017-01-21  0:07   ` Florian Fainelli
2017-01-20 23:30 ` [PATCH net-next 3/8] net: dsa: mv88e6xxx: Fix ATU age timer for MV88E6390 Andrew Lunn
2017-01-21  0:10   ` Vivien Didelot
2017-01-20 23:30 ` [PATCH net-next 4/8] net: dsa: mv88e6xxx: Set the CMODE for mv88e6390 ports 9 & 10 Andrew Lunn
2017-01-21  0:20   ` Vivien Didelot
2017-01-20 23:30 ` [PATCH net-next 5/8] net: dsa: mv88e6xxx: Workaround missing PHY ID on mv88e6390 Andrew Lunn
2017-01-21  0:03   ` Florian Fainelli
2017-01-21  0:26   ` Vivien Didelot
2017-01-24 21:00     ` Gregory CLEMENT [this message]
2017-01-20 23:31 ` [PATCH net-next 6/8] net: phy: Marvell: Add mv88e6390 internal PHY Andrew Lunn
2017-01-21  0:04   ` Florian Fainelli
2017-01-20 23:31 ` [PATCH net-next 7/8] net: dsa: mv88e6xxx: Implement Clause 45 access to SMI devices Andrew Lunn
2017-01-20 23:31 ` [PATCH net-next 8/8] net: dsa: mv88e6xxx: Fix typ0 when configuring 2.5Gbps Andrew Lunn
2017-01-21  0:53   ` Vivien Didelot
2017-01-23 18:06 ` [net-next 0/8] More MV88E6390 patches David Miller

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