From: Michal Simek <monstr@monstr•eu>
To: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft•com>
Cc: "Hein Tibosch" <hein_tibosch@yahoo•es>,
netdev@vger•kernel.org, "Nicolas Ferre" <nicolas.ferre@atmel•com>,
michal.simek@xilinx•com, linux-kernel@vger•kernel.org,
"Ludovic Desroches" <ludovic.desroches@atmel•com>,
s.trumtrar@pengutronix•de, linux-arm-kernel@lists•infradead.org,
"Sören Brinkmann" <soren.brinkmann@xilinx•com>
Subject: Re: [PATCH] net/macb: fix ISR clear-on-write behavior only for some SoC
Date: Tue, 04 Jun 2013 08:15:45 +0200 [thread overview]
Message-ID: <51AD8611.8070102@monstr.eu> (raw)
In-Reply-To: <20130514055256.GD22508@game.jcrosoft.org>
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On 05/14/2013 07:52 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 08:58 Tue 14 May , Hein Tibosch wrote:
>> On 5/14/2013 12:05 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>> On May 14, 2013, at 12:05 AM, Nicolas Ferre <nicolas.ferre@atmel•com> wrote:
>>>
>>>> Commit 749a2b6 (net/macb: clear tx/rx completion flags in ISR)
>>>> introduces clear-on-write on ISR register. This behavior is not always
>>>> implemented when using Cadence MACB/GEM and is breaking other platforms.
>>>> We are using a new Device Tree compatibility string and a capability
>>>> property to actually activate this clear-on-write behavior on ISR.
>>>>
>>>> Reported-by: Hein Tibosch <hein_tibosch@yahoo•es>
>>>> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel•com>
>>> can we detect it via the IP?
>>
>> This was my first proposal, have it based on the value of MACB's
>> register 'MID' (offset 0x00fc, lower 16 bits).
>> On avr32 it reads: 0x0000010D, on Zynq it reports 0x00000119
>>
>> So for the moment, CAPS_ISR_CLEAR_ON_WRITE could be set if the revision
>> equals to 0x00000119?
> so no it will not work
>
> as the gem on sama5 is 00020119
>
> so version 0x119 too
>
> nico
> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft•com>
Was this added to any queue or branch?
I would like to enable macb for zynq and not sure if "cdns,zynq-7000-gem"
compatible string goes to mainline.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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next prev parent reply other threads:[~2013-06-04 6:15 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-13 16:05 [PATCH] net/macb: fix ISR clear-on-write behavior only for some SoC Nicolas Ferre
2013-05-13 16:05 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-14 0:58 ` Hein Tibosch
2013-05-14 5:52 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-14 7:18 ` Hein Tibosch
2013-05-14 7:22 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-14 7:31 ` Hein Tibosch
2013-05-14 7:49 ` Michal Simek
2013-05-14 8:32 ` Hein Tibosch
2013-06-04 6:15 ` Michal Simek [this message]
2013-06-04 6:49 ` Steffen Trumtrar
2013-06-04 6:54 ` Michal Simek
2013-06-04 7:51 ` Nicolas Ferre
2013-06-04 7:57 ` Michal Simek
2013-05-14 9:16 ` Nicolas Ferre
2013-05-14 11:38 ` Michal Simek
2013-05-14 12:30 ` Nicolas Ferre
2013-05-14 7:01 ` Steffen Trumtrar
2013-05-14 13:00 ` [PATCH v2] " Nicolas Ferre
2013-05-14 13:43 ` Hein Tibosch
2013-05-14 16:24 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-14 20:04 ` David Miller
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