* [PATCH 1/4] net: ethernet: arc: Probe emac after set RMII clock
@ 2015-12-23 9:19 Xing Zheng
[not found] ` <1450862390-407-1-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Xing Zheng @ 2015-12-23 9:19 UTC (permalink / raw)
To: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: heiko-4mtYJXux2i+zQB+pC5nmwQ, Xing Zheng,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
leozwang-hpIqsD4AKlfQT0dZR+AlfA, keescook-hpIqsD4AKlfQT0dZR+AlfA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
After enter arc_emac_probe, emac will get_phy_id, phy_poll_reset and
other connecting PHY via mdiobus_read, so we need to set correct
ref clock rate for emac before probe emac.
Signed-off-by: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public•gmane.org>
---
drivers/net/ethernet/arc/emac_rockchip.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/arc/emac_rockchip.c b/drivers/net/ethernet/arc/emac_rockchip.c
index c31c740..36e9eb1 100644
--- a/drivers/net/ethernet/arc/emac_rockchip.c
+++ b/drivers/net/ethernet/arc/emac_rockchip.c
@@ -164,10 +164,6 @@ static int emac_rockchip_probe(struct platform_device *pdev)
}
}
- err = arc_emac_probe(ndev, interface);
- if (err)
- goto out_regulator_disable;
-
/* write-enable bits */
data = GRF_MODE_ENABLE_BIT | GRF_SPEED_ENABLE_BIT;
@@ -184,6 +180,13 @@ static int emac_rockchip_probe(struct platform_device *pdev)
err = clk_set_rate(priv->refclk, 50000000);
if (err)
dev_err(dev, "failed to change reference clock rate (%d)\n", err);
+
+ err = arc_emac_probe(ndev, interface);
+ if (err) {
+ dev_err(dev, "failed to probe arc emac (%d)\n", err);
+ goto out_regulator_disable;
+ }
+
return 0;
out_regulator_disable:
--
1.7.9.5
^ permalink raw reply related [flat|nested] 5+ messages in thread[parent not found: <1450862390-407-1-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>]
* [PATCH 2/4] net: ethernet: arc: Keep emac compatibility for more Rockchip SoCs [not found] ` <1450862390-407-1-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org> @ 2015-12-23 9:19 ` Xing Zheng 0 siblings, 0 replies; 5+ messages in thread From: Xing Zheng @ 2015-12-23 9:19 UTC (permalink / raw) To: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Cc: heiko-4mtYJXux2i+zQB+pC5nmwQ, Xing Zheng, netdev-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, leozwang-hpIqsD4AKlfQT0dZR+AlfA, keescook-hpIqsD4AKlfQT0dZR+AlfA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r On the RK3066/RK3188, there was fixed GRF offset configuration to set emac and fixed DIV2 mac TX/RX clock. So, we need to easily set and fit to other SoCs (RK3036) which maybe have different GRF offset, and need adjust mac TX/RX clock. Signed-off-by: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public•gmane.org> --- drivers/net/ethernet/arc/emac_rockchip.c | 66 ++++++++++++++++++++---------- 1 file changed, 44 insertions(+), 22 deletions(-) diff --git a/drivers/net/ethernet/arc/emac_rockchip.c b/drivers/net/ethernet/arc/emac_rockchip.c index 36e9eb1..d1a9c28 100644 --- a/drivers/net/ethernet/arc/emac_rockchip.c +++ b/drivers/net/ethernet/arc/emac_rockchip.c @@ -25,17 +25,13 @@ #include "emac.h" #define DRV_NAME "rockchip_emac" -#define DRV_VERSION "1.0" - -#define GRF_MODE_MII (1UL << 0) -#define GRF_MODE_RMII (0UL << 0) -#define GRF_SPEED_10M (0UL << 1) -#define GRF_SPEED_100M (1UL << 1) -#define GRF_SPEED_ENABLE_BIT (1UL << 17) -#define GRF_MODE_ENABLE_BIT (1UL << 16) +#define DRV_VERSION "1.1" struct emac_rockchip_soc_data { - int grf_offset; + unsigned int grf_offset; + unsigned int grf_mode_offset; + unsigned int grf_speed_offset; + bool need_div_macclk; }; struct rockchip_priv_data { @@ -44,23 +40,22 @@ struct rockchip_priv_data { const struct emac_rockchip_soc_data *soc_data; struct regulator *regulator; struct clk *refclk; + struct clk *macclk; }; static void emac_rockchip_set_mac_speed(void *priv, unsigned int speed) { struct rockchip_priv_data *emac = priv; + u32 speed_offset = emac->soc_data->grf_speed_offset; u32 data; int err = 0; - /* write-enable bits */ - data = GRF_SPEED_ENABLE_BIT; - switch(speed) { case 10: - data |= GRF_SPEED_10M; + data = (1 << (speed_offset + 16)) | (0 << speed_offset); break; case 100: - data |= GRF_SPEED_100M; + data = (1 << (speed_offset + 16)) | (1 << speed_offset); break; default: pr_err("speed %u not supported\n", speed); @@ -73,8 +68,14 @@ static void emac_rockchip_set_mac_speed(void *priv, unsigned int speed) } static const struct emac_rockchip_soc_data emac_rockchip_dt_data[] = { - { .grf_offset = 0x154 }, /* rk3066 */ - { .grf_offset = 0x0a4 }, /* rk3188 */ + { + .grf_offset = 0x154, .grf_mode_offset = 0, + .grf_speed_offset = 1, .need_div_macclk = 0 + }, /* rk3066 */ + { + .grf_offset = 0x0a4, .grf_mode_offset = 0, + .grf_speed_offset = 1, .need_div_macclk = 0 + }, /* rk3188 */ }; static const struct of_device_id emac_rockchip_dt_ids[] = { @@ -110,7 +111,7 @@ static int emac_rockchip_probe(struct platform_device *pdev) interface = of_get_phy_mode(dev->of_node); - /* RK3066 and RK3188 SoCs only support RMII */ + /* RK3036/RK3066/RK3188 SoCs only support RMII */ if (interface != PHY_INTERFACE_MODE_RMII) { dev_err(dev, "unsupported phy interface mode %d\n", interface); err = -ENOTSUPP; @@ -164,11 +165,12 @@ static int emac_rockchip_probe(struct platform_device *pdev) } } - /* write-enable bits */ - data = GRF_MODE_ENABLE_BIT | GRF_SPEED_ENABLE_BIT; - - data |= GRF_SPEED_100M; - data |= GRF_MODE_RMII; + /* Set speed 100M */ + data = (1 << (priv->soc_data->grf_speed_offset + 16)) | + (1 << priv->soc_data->grf_speed_offset); + /* Set RMII mode */ + data |= (1 << (priv->soc_data->grf_mode_offset + 16)) | + (0 << priv->soc_data->grf_mode_offset); err = regmap_write(priv->grf, priv->soc_data->grf_offset, data); if (err) { @@ -181,6 +183,26 @@ static int emac_rockchip_probe(struct platform_device *pdev) if (err) dev_err(dev, "failed to change reference clock rate (%d)\n", err); + if (priv->soc_data->need_div_macclk) { + priv->macclk = devm_clk_get(dev, "macclk"); + if (IS_ERR(priv->macclk)) { + dev_err(dev, "failed to retrieve mac clock (%ld)\n", PTR_ERR(priv->macclk)); + err = PTR_ERR(priv->macclk); + goto out_regulator_disable; + } + + err = clk_prepare_enable(priv->macclk); + if (err) { + dev_err(dev, "failed to enable mac clock (%d)\n", err); + goto out_regulator_disable; + } + + /* RMII TX/RX needs always a rate of 25MHz */ + err = clk_set_rate(priv->macclk, 25000000); + if (err) + dev_err(dev, "failed to change mac clock rate (%d)\n", err); + } + err = arc_emac_probe(ndev, interface); if (err) { dev_err(dev, "failed to probe arc emac (%d)\n", err); -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/4] net: ethernet: arc: Add support emac for RK3036 2015-12-23 9:19 [PATCH 1/4] net: ethernet: arc: Probe emac after set RMII clock Xing Zheng [not found] ` <1450862390-407-1-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org> @ 2015-12-23 9:19 ` Xing Zheng 2015-12-28 5:14 ` [PATCH 1/4] net: ethernet: arc: Probe emac after set RMII clock David Miller 2 siblings, 0 replies; 5+ messages in thread From: Xing Zheng @ 2015-12-23 9:19 UTC (permalink / raw) To: linux-rockchip Cc: keescook, leozwang, heiko, Xing Zheng, David S. Miller, Paul Gortmaker, Geert Uytterhoeven, netdev, linux-kernel, linux-arm-kernel The RK3036's GRFs offset are different with RK3066/RK3188, and need to set mac TX/RX clock before probe emac. Signed-off-by: Xing Zheng <zhengxing@rock-chips•com> --- drivers/net/ethernet/arc/Kconfig | 4 ++-- drivers/net/ethernet/arc/emac_rockchip.c | 9 +++++++-- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/arc/Kconfig b/drivers/net/ethernet/arc/Kconfig index 52a6b16..6890451 100644 --- a/drivers/net/ethernet/arc/Kconfig +++ b/drivers/net/ethernet/arc/Kconfig @@ -34,9 +34,9 @@ config EMAC_ROCKCHIP select ARC_EMAC_CORE depends on OF_IRQ && OF_NET && REGULATOR && HAS_DMA ---help--- - Support for Rockchip RK3066/RK3188 EMAC ethernet controllers. + Support for Rockchip RK3036/RK3066/RK3188 EMAC ethernet controllers. This selects Rockchip SoC glue layer support for the - emac device driver. This driver is used for RK3066/RK3188 + emac device driver. This driver is used for RK3036/RK3066/RK3188 EMAC ethernet controller. endif # NET_VENDOR_ARC diff --git a/drivers/net/ethernet/arc/emac_rockchip.c b/drivers/net/ethernet/arc/emac_rockchip.c index d1a9c28..2433eeb 100644 --- a/drivers/net/ethernet/arc/emac_rockchip.c +++ b/drivers/net/ethernet/arc/emac_rockchip.c @@ -69,6 +69,10 @@ static void emac_rockchip_set_mac_speed(void *priv, unsigned int speed) static const struct emac_rockchip_soc_data emac_rockchip_dt_data[] = { { + .grf_offset = 0x140, .grf_mode_offset = 8, + .grf_speed_offset = 9, .need_div_macclk = 1 + }, /* rk3036 */ + { .grf_offset = 0x154, .grf_mode_offset = 0, .grf_speed_offset = 1, .need_div_macclk = 0 }, /* rk3066 */ @@ -79,8 +83,9 @@ static const struct emac_rockchip_soc_data emac_rockchip_dt_data[] = { }; static const struct of_device_id emac_rockchip_dt_ids[] = { - { .compatible = "rockchip,rk3066-emac", .data = &emac_rockchip_dt_data[0] }, - { .compatible = "rockchip,rk3188-emac", .data = &emac_rockchip_dt_data[1] }, + { .compatible = "rockchip,rk3036-emac", .data = &emac_rockchip_dt_data[0] }, + { .compatible = "rockchip,rk3066-emac", .data = &emac_rockchip_dt_data[1] }, + { .compatible = "rockchip,rk3188-emac", .data = &emac_rockchip_dt_data[2] }, { /* Sentinel */ } }; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/4] net: ethernet: arc: Probe emac after set RMII clock 2015-12-23 9:19 [PATCH 1/4] net: ethernet: arc: Probe emac after set RMII clock Xing Zheng [not found] ` <1450862390-407-1-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 2015-12-23 9:19 ` [PATCH 3/4] net: ethernet: arc: Add support emac for RK3036 Xing Zheng @ 2015-12-28 5:14 ` David Miller 2015-12-28 7:27 ` Xing Zheng 2 siblings, 1 reply; 5+ messages in thread From: David Miller @ 2015-12-28 5:14 UTC (permalink / raw) To: zhengxing Cc: linux-rockchip, keescook, leozwang, heiko, netdev, linux-arm-kernel, linux-kernel I only see 3 patches in this series. Furthermore, you failed to provide a proper "[PATCH 0/4] xxx" posting providing a high level description of what this series is doing, and how it is doing it, and why. Thanks. ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/4] net: ethernet: arc: Probe emac after set RMII clock 2015-12-28 5:14 ` [PATCH 1/4] net: ethernet: arc: Probe emac after set RMII clock David Miller @ 2015-12-28 7:27 ` Xing Zheng 0 siblings, 0 replies; 5+ messages in thread From: Xing Zheng @ 2015-12-28 7:27 UTC (permalink / raw) To: David Miller Cc: linux-rockchip, keescook, leozwang, heiko, netdev, linux-arm-kernel, linux-kernel Hi David, Sorry, I missed the cover letter. I have added it and resent the patchset. Thanks. - Xing Zheng On 2015年12月28日 13:14, David Miller wrote: > I only see 3 patches in this series. > > Furthermore, you failed to provide a proper "[PATCH 0/4] xxx" posting > providing a high level description of what this series is doing, and > how it is doing it, and why. > > Thanks. > > > ^ permalink raw reply [flat|nested] 5+ messages in thread
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2015-12-23 9:19 [PATCH 1/4] net: ethernet: arc: Probe emac after set RMII clock Xing Zheng
[not found] ` <1450862390-407-1-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2015-12-23 9:19 ` [PATCH 2/4] net: ethernet: arc: Keep emac compatibility for more Rockchip SoCs Xing Zheng
2015-12-23 9:19 ` [PATCH 3/4] net: ethernet: arc: Add support emac for RK3036 Xing Zheng
2015-12-28 5:14 ` [PATCH 1/4] net: ethernet: arc: Probe emac after set RMII clock David Miller
2015-12-28 7:27 ` Xing Zheng
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