From: Mohd Ayaan Anwar <mohd.anwar@oss•qualcomm.com>
To: "Russell King (Oracle)" <linux@armlinux•org.uk>
Cc: "Andrew Lunn" <andrew@lunn•ch>,
"Heiner Kallweit" <hkallweit1@gmail•com>,
"Alexandre Torgue" <alexandre.torgue@foss•st.com>,
"Alexis Lothoré" <alexis.lothore@bootlin•com>,
"Andrew Lunn" <andrew+netdev@lunn•ch>,
"Boon Khai Ng" <boon.khai.ng@altera•com>,
"Daniel Machon" <daniel.machon@microchip•com>,
"David S. Miller" <davem@davemloft•net>,
"Eric Dumazet" <edumazet@google•com>,
"Furong Xu" <0x1207@gmail•com>,
"Jacob Keller" <jacob.e.keller@intel•com>,
"Jakub Kicinski" <kuba@kernel•org>,
"Jan Petrous (OSS)" <jan.petrous@oss•nxp.com>,
linux-arm-kernel@lists•infradead.org,
linux-stm32@st-md-mailman•stormreply.com,
"Maxime Chevallier" <maxime.chevallier@bootlin•com>,
"Maxime Coquelin" <mcoquelin.stm32@gmail•com>,
netdev@vger•kernel.org, "Paolo Abeni" <pabeni@redhat•com>,
"Simon Horman" <horms@kernel•org>,
"Vladimir Oltean" <olteanv@gmail•com>,
"Yu-Chun Lin" <eleanor15x@gmail•com>
Subject: Re: [PATCH net-next 0/3] net: stmmac: phylink PCS conversion part 3 (dodgy stuff)
Date: Wed, 5 Nov 2025 21:16:10 +0530 [thread overview]
Message-ID: <aQtxQgPWQ3+CCrZI@oss.qualcomm.com> (raw)
In-Reply-To: <aQOB_yCzCmAVM34V@shell.armlinux.org.uk>
Hello Russell,
On Thu, Oct 30, 2025 at 03:19:27PM +0000, Russell King (Oracle) wrote:
> > > Can you try:
> > >
> > > 1. in stmmac_check_pcs_mode(), as a hack, add:
> > >
> > > if (priv->dma_cap.pcs && interface == PHY_INTERFACE_MODE_2500BASEX)
> > > priv->hw->pcs = STMMAC_PCS_SGMII;
> > >
> > > 2. with part 3 added, please change dwmac4_pcs_init() to:
> > >
> > > phy_interface_t modes[] = {
> > > PHY_INTERFACE_MODE_SGMII,
> > > PHY_INTERFACE_MODE_2500BASEX,
> > > };
> > > ...
> > > return stmmac_integrated_pcs_init(priv, GMAC_PCS_BASE,
> > > GMAC_INT_PCS_LINK | GMAC_INT_PCS_ANE,
> > > modes, ARRAY_SIZE(modes));
> > >
> > > This will cause the integrated PCS to also be used for 2500BASE-X.
> > >
> > > 3. modify dwmac_integrated_pcs_inband_caps() to return
> > > LINK_INBAND_DISABLE for PHY_INTERFACE_MODE_2500BASEX.
> > >
> > > This should result in the warning going away for you.
> > >
> > > I'm not suggesting that this is a final solution.
> <snip>
> Please try again, this time with snps,ps-speed removed from the DT
> description for the interface. This property was a buggy attempt at
> reverse-SGMII, and incorrectly produced a warning if not specified
> when the integrated PCS was being used. The "bug" in the attempt
> with this was a typo in each MAC core driver, where specifying this
> set the TE (transmit enable) bit rather than the TC (transmit
> configuration) bit in the MAC control register. All the rest of the
> setup for reverse-SGMII mode was in place, but this bug made the
> entire thing useless.
>
I finally got some time to test out 100M/1G/2.5G with all these changes
on the QCS9100 Ride R3 board (AQR115C PHY, qcom-ethqos).
Apart from this patch series, I incorporated the following changes:
1. Hacks suggested to have the PCS code work for 2500Base-X.
2. Removed snps,ps-speed from DT.
3. Picked [PATCH net-next v2] net: stmmac: qcom-ethqos: remove
MAC_CTRL_REG modification.
Apologies for the lengthy email- I’ve included phylink logs for all
five points for completeness.
*Observations:*
1. 2.5G Link up - no warning about the PCS configuration getting changed
by glue. Data path works fine.
[ 10.342908] qcom-ethqos 23000000.ethernet eth0: PHY stmmac-0:00 uses interfaces 4,23,27, validating 23
[ 10.352486] qcom-ethqos 23000000.ethernet eth0: interface 23 (2500base-x) rate match pause supports 0-7,9,13-14,47
[ 10.363215] qcom-ethqos 23000000.ethernet eth0: PHY [stmmac-0:00] driver [Aquantia AQR115C] (irq=365)
[ 10.372690] qcom-ethqos 23000000.ethernet eth0: phy: 2500base-x setting supported 0000000,00000000,00008000,000062ff advertising 0000000,00000000,00008000,000062ff
[ 10.428389] qcom-ethqos 23000000.ethernet eth0: configuring for phy/2500base-x link mode
[ 10.436717] qcom-ethqos 23000000.ethernet eth0: major config, requested phy/2500base-x
[ 10.444870] qcom-ethqos 23000000.ethernet eth0: interface 2500base-x inband modes: pcs=01 phy=00
[ 10.453913] qcom-ethqos 23000000.ethernet eth0: major config, active phy/outband/2500base-x
[ 10.462506] qcom-ethqos 23000000.ethernet eth0: phylink_mac_config: mode=phy/2500base-x/none adv=0000000,00000000,00000000,00000000 pause=00
[ 10.485700] qcom-ethqos 23000000.ethernet eth0: phy link down 2500base-x/Unknown/Unknown/none/off/nolpi
[ 15.131941] qcom-ethqos 23000000.ethernet eth0: phy link up 2500base-x/2.5Gbps/Full/none/rx/tx/nolpi
[ 15.143632] qcom-ethqos 23000000.ethernet eth0: ethqos_configure_sgmii : Speed = 2500
[ 15.153226] stmmac_pcs: Link Up
[ 15.153274] qcom-ethqos 23000000.ethernet eth0: Link is Up - 2.5Gbps/Full - flow control rx/tx
2. 1G Link up - Warning (PCS configuration changed from phylink by glue,
please report: 0x00040000 -> 0x00041200). Data path works fine.
[ 10.420439] qcom-ethqos 23000000.ethernet eth0: PHY stmmac-0:00 uses interfaces 4,23,27, validating 23
[ 10.430023] qcom-ethqos 23000000.ethernet eth0: interface 23 (2500base-x) rate match pause supports 0-7,9,13-14,47
[ 10.440749] qcom-ethqos 23000000.ethernet eth0: PHY [stmmac-0:00] driver [Aquantia AQR115C] (irq=365)
[ 10.450223] qcom-ethqos 23000000.ethernet eth0: phy: 2500base-x setting supported 0000000,00000000,00008000,000062ff advertising 0000000,00000000,00008000,000062ff
[ 10.506829] qcom-ethqos 23000000.ethernet eth0: configuring for phy/2500base-x link mode
[ 10.515147] qcom-ethqos 23000000.ethernet eth0: major config, requested phy/2500base-x
[ 10.523291] qcom-ethqos 23000000.ethernet eth0: interface 2500base-x inband modes: pcs=01 phy=00
[ 10.532328] qcom-ethqos 23000000.ethernet eth0: major config, active phy/outband/2500base-x
[ 10.540919] qcom-ethqos 23000000.ethernet eth0: phylink_mac_config: mode=phy/2500base-x/none adv=0000000,00000000,00000000,00000000 pause=00
[ 10.563437] qcom-ethqos 23000000.ethernet eth0: phy link down 2500base-x/Unknown/Unknown/none/off/nolpi
[ 13.912074] qcom-ethqos 23000000.ethernet eth0: phy link up sgmii/1Gbps/Full/none/rx/tx/nolpi
[ 13.919074] stmmac_pcs: Link Up
< a *bunch* of "stmmac_pcs: Link Down" prints, more details in 4.>
[ 14.948996] stmmac_pcs: Link Up
[ 14.949149] stmmac_pcs: Link Down
[ 14.949169] stmmac_pcs: Link Up
[ 14.949301] qcom-ethqos 23000000.ethernet eth0: major config, requested phy/sgmii
[ 14.949317] stmmac_pcs: Link Down
[ 14.949326] qcom-ethqos 23000000.ethernet eth0: interface sgmii inband modes: pcs=03 phy=03
[ 14.949331] qcom-ethqos 23000000.ethernet eth0: major config, active phy/outband/sgmii
[ 14.949335] qcom-ethqos 23000000.ethernet eth0: phylink_mac_config: mode=phy/sgmii/none adv=0000000,00000000,00000000,00000000 pause=03
[ 14.952026] qcom-ethqos 23000000.ethernet eth0: ethqos_configure_sgmii : Speed = 1000
[ 14.952033] dwmac: PCS configuration changed from phylink by glue, please report: 0x00040000 -> 0x00041200
[ 14.952057] qcom-ethqos 23000000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx
[ 15.035977] stmmac_pcs: ANE process completed
[ 15.035978] stmmac_pcs: Link Down
[ 15.036004] stmmac_pcs: Link Up
3. 100M Link up - Warning (PCS configuration changed from phylink by
glue, please report: 0x00040000 -> 0x00041200). Data path works fine.
[ 20.273135] qcom-ethqos 23000000.ethernet eth0: PHY stmmac-0:00 uses interfaces 4,23,27, validating 23
[ 20.282703] qcom-ethqos 23000000.ethernet eth0: interface 23 (2500base-x) rate match pause supports 0-7,9,13-14,47
[ 20.293413] qcom-ethqos 23000000.ethernet eth0: PHY [stmmac-0:00] driver [Aquantia AQR115C] (irq=340)
[ 20.302877] qcom-ethqos 23000000.ethernet eth0: phy: 2500base-x setting supported 0000000,00000000,00008000,000062ff advertising 0000000,00000000,00008000,000062ff
[ 20.358642] qcom-ethqos 23000000.ethernet eth0: configuring for phy/2500base-x link mode
[ 20.366973] qcom-ethqos 23000000.ethernet eth0: major config, requested phy/2500base-x
[ 20.381114] qcom-ethqos 23000000.ethernet eth0: interface 2500base-x inband modes: pcs=01 phy=00
[ 20.390144] qcom-ethqos 23000000.ethernet eth0: major config, active phy/outband/2500base-x
[ 20.398720] qcom-ethqos 23000000.ethernet eth0: phylink_mac_config: mode=phy/2500base-x/none adv=0000000,00000000,00000000,00000000 pause=00
[ 20.418477] stmmac_pcs: Link Down
[ 20.421912] stmmac_pcs: Link Down
[ 20.426255] qcom-ethqos 23000000.ethernet eth0: phy link down 2500base-x/100Mbps/Full/none/rx/tx/nolpi
[ 20.440795] stmmac_pcs: Link Down
[ 23.095229] qcom-ethqos 23000000.ethernet eth0: phy link up sgmii/100Mbps/Full/none/rx/tx/nolpi
[ 23.101362] stmmac_pcs: Link Down
[ 23.106527] qcom-ethqos 23000000.ethernet eth0: major config, requested phy/sgmii
[ 23.107624] stmmac_pcs: Link Down
[ 23.118707] stmmac_pcs: Link Down
[ 23.124703] qcom-ethqos 23000000.ethernet eth0: interface sgmii inband modes: pcs=03 phy=03
[ 23.128141] stmmac_pcs: Link Down
[ 23.136699] qcom-ethqos 23000000.ethernet eth0: major config, active phy/outband/sgmii
[ 23.140126] stmmac_pcs: Link Down
[ 23.148232] qcom-ethqos 23000000.ethernet eth0: phylink_mac_config: mode=phy/sgmii/none adv=0000000,00000000,00000000,00000000 pause=03
[ 23.151657] stmmac_pcs: Link Down
[ 23.166924] qcom-ethqos 23000000.ethernet eth0: ethqos_configure_sgmii : Speed = 100
[ 23.167584] stmmac_pcs: Link Down
[ 23.175511] dwmac: PCS configuration changed from phylink by glue, please report: 0x00040000 -> 0x00041200
[ 23.178944] stmmac_pcs: Link Up
[ 23.188862] qcom-ethqos 23000000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx
[ 23.192097] stmmac_pcs: Link Down
[ 23.204346] stmmac_pcs: ANE process completed
[ 23.208828] stmmac_pcs: Link Up
4. Sometimes after toggling the interface or even during boot-up, the
console gets flooded with "stmmac_pcs: Link Down" prints. For e.g.,
// Interface toggled
< a bunch of "stmmac_pcs: Link Down" prints>
[ 549.898750] stmmac_pcs: Link Down
[ 549.902186] stmmac_pcs: Link Down
[ 549.905628] stmmac_pcs: Link Down
[ 549.909069] stmmac_pcs: Link Down
[ 549.912509] stmmac_pcs: Link Down
[ 549.915948] stmmac_pcs: Link Down
[ 549.919391] stmmac_pcs: Link Down
[ 549.922858] stmmac_pcs: Link Down
[ 549.924140] qcom-ethqos 23000000.ethernet eth0: ethqos_configure_sgmii : Speed = 2500
[ 549.926304] stmmac_pcs: Link Down
[ 549.934349] qcom-ethqos 23000000.ethernet eth0: Link is Up - 2.5Gbps/Full - flow control rx/tx
[ 549.937746] stmmac_pcs: Link Up
ethtool stats reveal an unusually high number of interrupts (I have
seen this number go as high as about 16000 when booting up with a 1G
link)
irq_pcs_ane_n: 0
irq_pcs_link_n: 1998
5. Switching between 100M/1G/2.5G link is a bit of a mixed bag.
Sometimes it works, sometimes the data path breaks and needs an
interface toggle to be functional again. I don't necessarily think that
it's due to the speed specific configurations done by configure_sgmii as
that shouldn't impact switching between 1G and 2.5G, or even the switch
from 1G/2.5G to 100M.
While this is *broken* on net-next as well, the current patch series
allowed me to notice a peculiar behavior - it looks like sometimes the
PCS link doesn't come up:
[ 55.491996] qcom-ethqos 23000000.ethernet eth0: phy link down 2500base-x/2.5Gbps/Full/none/rx/tx/nolpi
[ 55.501622] qcom-ethqos 23000000.ethernet eth0: Link is Down
[ 58.907705] qcom-ethqos 23000000.ethernet eth0: phy link up sgmii/1Gbps/Full/none/rx/tx/nolpi
[ 58.913724] stmmac_pcs: Link Down
[ 58.919947] qcom-ethqos 23000000.ethernet eth0: major config, requested phy/sgmii
[ 58.927656] qcom-ethqos 23000000.ethernet eth0: interface sgmii inband modes: pcs=03 phy=03
[ 58.936256] qcom-ethqos 23000000.ethernet eth0: major config, active phy/outband/sgmii
[ 58.944409] qcom-ethqos 23000000.ethernet eth0: phylink_mac_config: mode=phy/sgmii/none adv=0000000,00000000,00000000,00000000 pause=03
[ 58.958298] qcom-ethqos 23000000.ethernet eth0: ethqos_configure_sgmii : Speed = 1000
[ 58.967448] dwmac: PCS configuration changed from phylink by glue, please report: 0x00040000 -> 0x00041200
[ 58.977392] qcom-ethqos 23000000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx
Since 5 is unrelated to this series (I'll try to debug it separately),
let me know if you'd like me to run any other experiments for 2, 3, and
4.
> The "invalid port speed" warning that results if this property is
> not set to 10, 100 or 1000 is another bug - only if this warning
> is printed will the "normal" mode be selected.
>
> Since the PCS series 1 and 2 have been merged into net-next, it
> will be safe to submit patches removing these properties from your
> DT files, without fear of this warning appearing.
>
Thanks for the explanation. I see the incorrect use of snps,ps-speed in
the DT of a couple of more boards that use the same MAC core. Would it
be okay to add your Suggested-by when submitting the fix patches?
Ayaan
next prev parent reply other threads:[~2025-11-05 15:46 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-25 20:47 [PATCH net-next 0/3] net: stmmac: phylink PCS conversion part 3 (dodgy stuff) Russell King (Oracle)
2025-10-25 20:48 ` [PATCH net-next 1/3] net: stmmac: configure AN control according to phylink Russell King (Oracle)
2025-10-25 20:48 ` [PATCH net-next 2/3] net: stmmac: report PCS configuration changes Russell King (Oracle)
2025-10-25 20:48 ` [PATCH net-next 3/3] net: stmmac: add support specifying PCS supported interfaces Russell King (Oracle)
2025-10-28 10:16 ` Maxime Chevallier
2025-10-28 10:35 ` Russell King (Oracle)
2025-10-28 10:40 ` Russell King (Oracle)
2025-10-28 11:26 ` Maxime Chevallier
2025-10-28 21:12 ` [PATCH net-next 0/3] net: stmmac: phylink PCS conversion part 3 (dodgy stuff) Mohd Ayaan Anwar
2025-10-29 9:22 ` Russell King (Oracle)
2025-10-30 13:20 ` Mohd Ayaan Anwar
2025-10-30 15:19 ` Russell King (Oracle)
2025-10-30 15:22 ` Russell King (Oracle)
2025-11-03 8:58 ` Mohd Ayaan Anwar
2025-11-03 9:52 ` Russell King (Oracle)
2025-11-03 10:18 ` Mohd Ayaan Anwar
2025-11-03 10:47 ` Russell King (Oracle)
2025-11-03 10:48 ` Vladimir Oltean
2025-11-03 11:20 ` Mohd Ayaan Anwar
2025-11-03 11:43 ` Russell King (Oracle)
2025-11-03 12:13 ` Vladimir Oltean
2025-11-03 14:47 ` Mohd Ayaan Anwar
2025-11-03 17:15 ` Russell King (Oracle)
2025-11-03 17:02 ` Russell King (Oracle)
2025-11-03 12:17 ` Mohd Ayaan Anwar
2025-11-03 17:13 ` Russell King (Oracle)
2025-11-05 15:46 ` Mohd Ayaan Anwar [this message]
2025-11-05 18:12 ` Russell King (Oracle)
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