From: Dev Jain <dev.jain@arm•com>
To: Anshuman Khandual <anshuman.khandual@arm•com>,
linux-arm-kernel@lists•infradead.org
Cc: Catalin Marinas <catalin.marinas@arm•com>,
Will Deacon <will@kernel•org>,
Ryan Roberts <ryan.roberts@arm•com>,
Mark Rutland <mark.rutland@arm•com>,
Lorenzo Stoakes <lorenzo.stoakes@oracle•com>,
Andrew Morton <akpm@linux-foundation•org>,
David Hildenbrand <david@kernel•org>,
Mike Rapoport <rppt@kernel•org>,
Linu Cherian <linu.cherian@arm•com>,
Usama Arif <usama.arif@linux•dev>,
linux-kernel@vger•kernel.org, linux-mm@kvack•org
Subject: Re: [RFC V2 13/14] arm64/mm: Add an abstraction level for tlbi_op
Date: Mon, 1 Jun 2026 16:36:26 +0530 [thread overview]
Message-ID: <2000d7c9-3188-4539-ba9e-654d6460e21d@arm.com> (raw)
In-Reply-To: <20260513044547.4128549-14-anshuman.khandual@arm.com>
On 13/05/26 10:15 am, Anshuman Khandual wrote:
> From: Linu Cherian <linu.cherian@arm•com>
>
> With FEAT_D128, a new instruction aka TLBIP is being introduced for the TLB
> range operations which has an argument size of 128 bit.
>
> Add an abstraction level to void (*tlbi_op)(u64 arg) helpers to support the
> D128 variations when applicable.
>
> No functional changes are introduced with this patch.
>
> Signed-off-by: Linu Cherian <linu.cherian@arm•com>
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm•com>
> ---
> arch/arm64/include/asm/tlbflush.h | 70 ++++++++++++++++---------------
> 1 file changed, 37 insertions(+), 33 deletions(-)
>
> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
> index c0bf5b398041..361d74ef8016 100644
> --- a/arch/arm64/include/asm/tlbflush.h
> +++ b/arch/arm64/include/asm/tlbflush.h
> @@ -162,49 +162,53 @@ static inline void sme_dvmsync_batch(struct arch_tlbflush_unmap_batch *batch)
>
> #define TLBI_TTL_UNKNOWN INT_MAX
>
> -typedef void (*tlbi_op)(u64 arg);
> +typedef u64 tlbi_args_t;
> +#define __tlbi_wrapper(op, arg) __tlbi(op, arg)
> +#define __tlbi_user_wrapper(op, arg) __tlbi_user(op, arg)
The suffix "wrapper" sounds weird. How about "emit"?
>
> -static __always_inline void vae1is(u64 arg)
> +typedef void (*tlbi_op)(tlbi_args_t arg);
> +
> +static __always_inline void vae1is(tlbi_args_t arg)
> {
> - __tlbi(vae1is, arg);
> - __tlbi_user(vae1is, arg);
> + __tlbi_wrapper(vae1is, arg);
> + __tlbi_user_wrapper(vae1is, arg);
> }
>
> -static __always_inline void vae2is(u64 arg)
> +static __always_inline void vae2is(tlbi_args_t arg)
> {
> - __tlbi(vae2is, arg);
> + __tlbi_wrapper(vae2is, arg);
> }
>
> -static __always_inline void vale1(u64 arg)
> +static __always_inline void vale1(tlbi_args_t arg)
> {
> - __tlbi(vale1, arg);
> - __tlbi_user(vale1, arg);
> + __tlbi_wrapper(vale1, arg);
> + __tlbi_user_wrapper(vale1, arg);
> }
>
> -static __always_inline void vale1is(u64 arg)
> +static __always_inline void vale1is(tlbi_args_t arg)
> {
> - __tlbi(vale1is, arg);
> - __tlbi_user(vale1is, arg);
> + __tlbi_wrapper(vale1is, arg);
> + __tlbi_user_wrapper(vale1is, arg);
> }
>
> -static __always_inline void vale2is(u64 arg)
> +static __always_inline void vale2is(tlbi_args_t arg)
> {
> - __tlbi(vale2is, arg);
> + __tlbi_wrapper(vale2is, arg);
> }
>
> -static __always_inline void vaale1is(u64 arg)
> +static __always_inline void vaale1is(tlbi_args_t arg)
> {
> - __tlbi(vaale1is, arg);
> + __tlbi_wrapper(vaale1is, arg);
> }
>
> -static __always_inline void ipas2e1(u64 arg)
> +static __always_inline void ipas2e1(tlbi_args_t arg)
> {
> - __tlbi(ipas2e1, arg);
> + __tlbi_wrapper(ipas2e1, arg);
> }
>
> -static __always_inline void ipas2e1is(u64 arg)
> +static __always_inline void ipas2e1is(tlbi_args_t arg)
> {
> - __tlbi(ipas2e1is, arg);
> + __tlbi_wrapper(ipas2e1is, arg);
> }
>
> static __always_inline void __tlbi_level_asid(tlbi_op op, u64 addr, u32 level,
> @@ -475,32 +479,32 @@ static inline void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch)
> * operations can only span an even number of pages. We save this for last to
> * ensure 64KB start alignment is maintained for the LPA2 case.
> */
> -static __always_inline void rvae1is(u64 arg)
> +static __always_inline void rvae1is(tlbi_args_t arg)
> {
> - __tlbi(rvae1is, arg);
> - __tlbi_user(rvae1is, arg);
> + __tlbi_wrapper(rvae1is, arg);
> + __tlbi_user_wrapper(rvae1is, arg);
> }
>
> -static __always_inline void rvale1(u64 arg)
> +static __always_inline void rvale1(tlbi_args_t arg)
> {
> - __tlbi(rvale1, arg);
> - __tlbi_user(rvale1, arg);
> + __tlbi_wrapper(rvale1, arg);
> + __tlbi_user_wrapper(rvale1, arg);
> }
>
> -static __always_inline void rvale1is(u64 arg)
> +static __always_inline void rvale1is(tlbi_args_t arg)
> {
> - __tlbi(rvale1is, arg);
> - __tlbi_user(rvale1is, arg);
> + __tlbi_wrapper(rvale1is, arg);
> + __tlbi_user_wrapper(rvale1is, arg);
> }
>
> -static __always_inline void rvaale1is(u64 arg)
> +static __always_inline void rvaale1is(tlbi_args_t arg)
> {
> - __tlbi(rvaale1is, arg);
> + __tlbi_wrapper(rvaale1is, arg);
> }
>
> -static __always_inline void ripas2e1is(u64 arg)
> +static __always_inline void ripas2e1is(tlbi_args_t arg)
> {
> - __tlbi(ripas2e1is, arg);
> + __tlbi_wrapper(ripas2e1is, arg);
> }
>
> static __always_inline void __tlbi_range(tlbi_op op, u64 addr,
next prev parent reply other threads:[~2026-06-01 11:06 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-13 4:45 [RFC V2 00/14] arm64/mm: Enable 128 bit page table entries Anshuman Khandual
2026-05-13 4:45 ` [RFC V2 01/14] mm: Abstract printing of pxd_val() Anshuman Khandual
2026-05-17 18:57 ` Mike Rapoport
2026-05-19 14:28 ` Dave Hansen
2026-05-20 10:41 ` David Hildenbrand (Arm)
2026-05-21 3:43 ` Anshuman Khandual
2026-05-21 9:42 ` David Laight
2026-06-01 6:26 ` Anshuman Khandual
2026-05-13 4:45 ` [RFC V2 02/14] mm: Add read-write accessors for vm_page_prot Anshuman Khandual
2026-05-17 18:59 ` Mike Rapoport
2026-05-13 4:45 ` [RFC V2 03/14] arm64/mm: Convert READ_ONCE() as pmdp_get() while accessing PMD Anshuman Khandual
2026-05-13 4:45 ` [RFC V2 04/14] arm64/mm: Convert READ_ONCE() as pudp_get() while accessing PUD Anshuman Khandual
2026-05-13 4:45 ` [RFC V2 05/14] arm64/mm: Convert READ_ONCE() as p4dp_get() while accessing P4D Anshuman Khandual
2026-05-13 4:45 ` [RFC V2 06/14] arm64/mm: Convert READ_ONCE() as pgdp_get() while accessing PGD Anshuman Khandual
2026-05-13 4:45 ` [RFC V2 07/14] arm64/mm: Route all pgtable reads via pxxval_get() Anshuman Khandual
2026-05-27 14:11 ` Ryan Roberts
2026-06-01 5:01 ` Anshuman Khandual
2026-05-13 4:45 ` [RFC V2 08/14] arm64/mm: Route all pgtable writes via pxxval_set() Anshuman Khandual
2026-05-27 14:12 ` Ryan Roberts
2026-05-13 4:45 ` [RFC V2 09/14] arm64/mm: Route all pgtable atomics to central helpers Anshuman Khandual
2026-05-13 4:45 ` [RFC V2 10/14] arm64/mm: Abstract printing of pxd_val() Anshuman Khandual
2026-05-13 4:45 ` [RFC V2 11/14] arm64/mm: Override read-write accessors for vm_page_prot Anshuman Khandual
2026-05-13 4:45 ` [RFC V2 13/14] arm64/mm: Add an abstraction level for tlbi_op Anshuman Khandual
2026-05-27 14:50 ` Ryan Roberts
2026-05-29 4:02 ` Linu Cherian
2026-06-01 5:36 ` Anshuman Khandual
2026-06-01 11:06 ` Dev Jain [this message]
2026-05-13 4:45 ` [RFC V2 14/14] arm64/mm: Add initial support for FEAT_D128 page tables Anshuman Khandual
2026-05-27 14:54 ` Ryan Roberts
2026-06-01 10:52 ` Linu Cherian
2026-05-13 9:39 ` [RFC V2 00/14] arm64/mm: Enable 128 bit page table entries Lorenzo Stoakes
2026-05-18 4:20 ` Anshuman Khandual
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