Re: [PATCH v4 10/21] PM / devfreq: rockchip-dfi: Add RK3568 support

From: Jonathan Cameron <Jonathan.Cameron@Huawei•com>
To: Sascha Hauer <s.hauer@pengutronix•de>
Cc: <linux-rockchip@lists•infradead.org>,
	<linux-arm-kernel@lists•infradead.org>,
	Heiko Stuebner <heiko@sntech•de>,
	Kyungmin Park <kyungmin.park@samsung•com>,
	MyungJoo Ham <myungjoo.ham@samsung•com>,
	Will Deacon <will@kernel•org>,
	Mark Rutland <mark.rutland@arm•com>, <kernel@pengutronix•de>,
	Michael Riesch <michael.riesch@wolfvision•net>
Subject: Re: [PATCH v4 10/21] PM / devfreq: rockchip-dfi: Add RK3568 support
Date: Wed, 17 May 2023 15:46:16 +0100	[thread overview]
Message-ID: <20230517154616.000007f5@Huawei.com> (raw)
In-Reply-To: <20230517113828.GY29365@pengutronix.de>

> > > +
> > > +	regmap_read(regmap_pmu, RK3568_PMUGRF_OS_REG2, &reg2);
> > > +	regmap_read(regmap_pmu, RK3568_PMUGRF_OS_REG3, &reg3);
> > > +
> > > +	dfi->ddr_type = FIELD_GET(RK3568_PMUGRF_OS_REG2_DRAMTYPE_INFO, reg2);
> > > +
> > > +	if (FIELD_GET(RK3568_PMUGRF_OS_REG3_SYSREG_VERSION, reg3) >= 0x3)
> > > +		dfi->ddr_type |= FIELD_GET(RK3568_PMUGRF_OS_REG3_DRAMTYPE_INFO_V3, reg3) << 3;  
> > 
> > This is unusual enough that I'd suggest some comments to say how
> > the bits are distributed across the two registers.  
> 
> I'd say in version 3 of the register structure they realized that they
> need two bits more for the ddr_type and have put them in BIT(12) and
> BIT(13) of RK3568_PMUGRF_OS_REG3. I think the code makes that
> sufficiently clear and apart from this code taken from the downstream
> kernel I don't have any documentation of these registers.
> 
> Sascha
OK, that's fine.

Jonathan

> 


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