From: Jonathan Cameron <jonathan.cameron@huawei•com>
To: Nicolin Chen <nicolinc@nvidia•com>
Cc: <jgg@nvidia•com>, <will@kernel•org>, <robin.murphy@arm•com>,
<bhelgaas@google•com>, <joro@8bytes•org>, <praan@google•com>,
<baolu.lu@linux•intel.com>, <kevin.tian@intel•com>,
<miko.lenczewski@arm•com>, <linux-arm-kernel@lists•infradead.org>,
<iommu@lists•linux.dev>, <linux-kernel@vger•kernel.org>,
<linux-pci@vger•kernel.org>, <dan.j.williams@intel•com>,
<vsethi@nvidia•com>, <linux-cxl@vger•kernel.org>
Subject: Re: [PATCH v3 1/3] PCI: Allow ATS to be always on for CXL.cache capable devices
Date: Mon, 9 Mar 2026 11:48:35 +0000 [thread overview]
Message-ID: <20260309114835.000051c9@huawei.com> (raw)
In-Reply-To: <a0dd3e4cc5260f55bbec5b3ed6791def33028735.1772833963.git.nicolinc@nvidia.com>
On Fri, 6 Mar 2026 15:41:15 -0800
Nicolin Chen <nicolinc@nvidia•com> wrote:
> Controlled by the IOMMU driver, ATS is usually enabled "on demand" when a
> device requests a translation service from its associated IOMMU HW running
> on the channel of a given PASID. This is working even when a device has no
> translation on its RID (i.e., the RID is IOMMU bypassed).
>
> However, certain PCIe devices require non-PASID ATS on their RID even when
> the RID is IOMMU bypassed. Call this "always on".
>
> For instance, the CXL spec notes in "3.2.5.13 Memory Type on CXL.cache":
> "To source requests on CXL.cache, devices need to get the Host Physical
> Address (HPA) from the Host by means of an ATS request on CXL.io."
>
> In other words, the CXL.cache capability requires ATS; otherwise, it can't
> access host physical memory.
>
> Introduce a new pci_ats_always_on() helper for the IOMMU driver to scan a
> PCI device and shift ATS policies between "on demand" and "always on".
>
> Add the support for CXL.cache devices first. Pre-CXL devices will be added
> in quirks.c file.
>
> Note that pci_ats_always_on() validates against pci_ats_supported(), so we
> ensure that untrusted devices (e.g. external ports) will not be always on.
> This maintains the existing ATS security policy regarding potential side-
> channel attacks via ATS.
>
> Cc: linux-cxl@vger•kernel.org
> Suggested-by: Vikram Sethi <vsethi@nvidia•com>
> Suggested-by: Jason Gunthorpe <jgg@nvidia•com>
> Signed-off-by: Nicolin Chen <nicolinc@nvidia•com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei•com>
next prev parent reply other threads:[~2026-03-09 11:48 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-06 23:41 [PATCH v3 0/3] Allow ATS to be always on for certain ATS-capable devices Nicolin Chen
2026-03-06 23:41 ` [PATCH v3 1/3] PCI: Allow ATS to be always on for CXL.cache capable devices Nicolin Chen
2026-03-08 20:49 ` Nirmoy Das
2026-03-08 20:53 ` Nirmoy Das
2026-03-09 11:48 ` Jonathan Cameron [this message]
2026-03-26 21:38 ` Bjorn Helgaas
2026-03-26 21:51 ` Jason Gunthorpe
2026-03-30 12:48 ` Jason Gunthorpe
2026-03-31 8:19 ` Tian, Kevin
2026-04-09 22:45 ` Nicolin Chen
2026-04-09 22:52 ` Jason Gunthorpe
2026-04-10 0:04 ` Nicolin Chen
2026-04-10 3:13 ` Tian, Kevin
2026-04-10 12:05 ` Jason Gunthorpe
2026-04-13 6:40 ` Tian, Kevin
2026-03-06 23:41 ` [PATCH v3 2/3] PCI: Allow ATS to be always on for pre-CXL devices Nicolin Chen
2026-03-08 20:50 ` Nirmoy Das
2026-03-08 20:54 ` Nirmoy Das
2026-03-09 11:50 ` Jonathan Cameron
2026-03-30 12:49 ` Jason Gunthorpe
2026-03-31 8:24 ` Tian, Kevin
2026-03-06 23:41 ` [PATCH v3 3/3] iommu/arm-smmu-v3: Allow ATS to be always on Nicolin Chen
2026-03-08 20:52 ` Nirmoy Das
2026-03-30 12:51 ` Jason Gunthorpe
2026-03-31 8:40 ` Tian, Kevin
2026-03-31 12:08 ` Jason Gunthorpe
2026-04-01 8:15 ` Tian, Kevin
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