From: Nirmoy Das <nirmoyd@nvidia•com>
To: Nicolin Chen <nicolinc@nvidia•com>, <jgg@nvidia•com>,
<will@kernel•org>, <robin.murphy@arm•com>, <bhelgaas@google•com>
Cc: <joro@8bytes•org>, <praan@google•com>, <baolu.lu@linux•intel.com>,
<kevin.tian@intel•com>, <miko.lenczewski@arm•com>,
<linux-arm-kernel@lists•infradead.org>, <iommu@lists•linux.dev>,
<linux-kernel@vger•kernel.org>, <linux-pci@vger•kernel.org>,
<dan.j.williams@intel•com>, <jonathan.cameron@huawei•com>,
<vsethi@nvidia•com>, <linux-cxl@vger•kernel.org>
Subject: Re: [PATCH v3 2/3] PCI: Allow ATS to be always on for pre-CXL devices
Date: Sun, 8 Mar 2026 21:54:22 +0100 [thread overview]
Message-ID: <3d8f1e72-6098-43e8-aefa-e60f07bb81e7@nvidia.com> (raw)
In-Reply-To: <50281260-62e4-427f-bd66-e8be58062a03@nvidia.com>
On 08.03.26 21:50, Nirmoy Das wrote:
>
> On 07.03.26 00:41, Nicolin Chen wrote:
>> Some NVIDIA GPU/NIC devices, although don't implement the CXL config
>> space,
>> they have many CXL-like properties. Call this kind "pre-CXL".
>>
>> Similar to CXL.cache capaiblity, these pre-CXL devices also require
>> the ATS
>> function even when their RIDs are IOMMU bypassed, i.e. keep ATS
>> "always on"
>> v.s. "on demand" when a non-zero PASID line gets enabled in SVA use
>> cases.
>>
>> Introduce pci_dev_specific_ats_always_on() quirk function to scan a
>> list of
>> IDs for these device. Then, include it pci_ats_always_on().
>>
>> Suggested-by: Jason Gunthorpe <jgg@nvidia•com>
>> Signed-off-by: Nicolin Chen <nicolinc@nvidia•com>
>
> Tested-by: Nirmoy Das <nirmoyd@nvidia•com>
>
> Reviewed-by: Nirmoy Das <nirmoy@nvidia•com>
Sent with wrong email address
Reviewed-by: Nirmoy Das <nirmoyd@nvidia•com>
>
>> ---
>> drivers/pci/pci.h | 9 +++++++++
>> drivers/pci/ats.c | 3 ++-
>> drivers/pci/quirks.c | 26 ++++++++++++++++++++++++++
>> 3 files changed, 37 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
>> index 13d998fbacce6..13fa71f965900 100644
>> --- a/drivers/pci/pci.h
>> +++ b/drivers/pci/pci.h
>> @@ -1150,6 +1150,15 @@ static inline int
>> pci_dev_specific_reset(struct pci_dev *dev, bool probe)
>> }
>> #endif
>> +#if defined(CONFIG_PCI_QUIRKS) && defined(CONFIG_PCI_ATS)
>> +bool pci_dev_specific_ats_always_on(struct pci_dev *dev);
>> +#else
>> +static inline bool pci_dev_specific_ats_always_on(struct pci_dev *dev)
>> +{
>> + return false;
>> +}
>> +#endif
>> +
>> #if defined(CONFIG_PCI_QUIRKS) && defined(CONFIG_ARM64)
>> int acpi_get_rc_resources(struct device *dev, const char *hid, u16
>> segment,
>> struct resource *res);
>> diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
>> index cf262eb6e6890..e6995b536ad4c 100644
>> --- a/drivers/pci/ats.c
>> +++ b/drivers/pci/ats.c
>> @@ -243,7 +243,8 @@ bool pci_ats_always_on(struct pci_dev *pdev)
>> if (pdev->is_virtfn)
>> pdev = pci_physfn(pdev);
>> - return pci_cxl_ats_always_on(pdev);
>> + return pci_cxl_ats_always_on(pdev) ||
>> + pci_dev_specific_ats_always_on(pdev);
>> }
>> EXPORT_SYMBOL_GPL(pci_ats_always_on);
>> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
>> index 48946cca4be72..21451e62f284e 100644
>> --- a/drivers/pci/quirks.c
>> +++ b/drivers/pci/quirks.c
>> @@ -5714,6 +5714,32 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,
>> 0x1457, quirk_intel_e2000_no_ats);
>> DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1459,
>> quirk_intel_e2000_no_ats);
>> DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x145a,
>> quirk_intel_e2000_no_ats);
>> DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x145c,
>> quirk_intel_e2000_no_ats);
>> +
>> +static const struct pci_dev_ats_always_on {
>> + u16 vendor;
>> + u16 device;
>> +} pci_dev_ats_always_on[] = {
>> + /* NVIDIA GPUs */
>> + { PCI_VENDOR_ID_NVIDIA, 0x2e12, },
>> + { PCI_VENDOR_ID_NVIDIA, 0x2e2a, },
>> + { PCI_VENDOR_ID_NVIDIA, 0x2e2b, },
>> + /* NVIDIA CX10 Family NVlink-C2C */
>> + { PCI_VENDOR_ID_MELLANOX, 0x2101, },
>> + { 0 }
>> +};
>> +
>> +/* Some pre-CXL devices require ATS on the RID when it is
>> IOMMU-bypassed */
>> +bool pci_dev_specific_ats_always_on(struct pci_dev *pdev)
>> +{
>> + const struct pci_dev_ats_always_on *i;
>> +
>> + for (i = pci_dev_ats_always_on; i->vendor; i++) {
>> + if (i->vendor == pdev->vendor && i->device == pdev->device)
>> + return true;
>> + }
>> +
>> + return false;
>> +}
>> #endif /* CONFIG_PCI_ATS */
>> /* Freescale PCIe doesn't support MSI in RC mode */
>
next prev parent reply other threads:[~2026-03-08 20:55 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-06 23:41 [PATCH v3 0/3] Allow ATS to be always on for certain ATS-capable devices Nicolin Chen
2026-03-06 23:41 ` [PATCH v3 1/3] PCI: Allow ATS to be always on for CXL.cache capable devices Nicolin Chen
2026-03-08 20:49 ` Nirmoy Das
2026-03-08 20:53 ` Nirmoy Das
2026-03-09 11:48 ` Jonathan Cameron
2026-03-26 21:38 ` Bjorn Helgaas
2026-03-26 21:51 ` Jason Gunthorpe
2026-03-30 12:48 ` Jason Gunthorpe
2026-03-31 8:19 ` Tian, Kevin
2026-04-09 22:45 ` Nicolin Chen
2026-04-09 22:52 ` Jason Gunthorpe
2026-04-10 0:04 ` Nicolin Chen
2026-04-10 3:13 ` Tian, Kevin
2026-04-10 12:05 ` Jason Gunthorpe
2026-04-13 6:40 ` Tian, Kevin
2026-03-06 23:41 ` [PATCH v3 2/3] PCI: Allow ATS to be always on for pre-CXL devices Nicolin Chen
2026-03-08 20:50 ` Nirmoy Das
2026-03-08 20:54 ` Nirmoy Das [this message]
2026-03-09 11:50 ` Jonathan Cameron
2026-03-30 12:49 ` Jason Gunthorpe
2026-03-31 8:24 ` Tian, Kevin
2026-03-06 23:41 ` [PATCH v3 3/3] iommu/arm-smmu-v3: Allow ATS to be always on Nicolin Chen
2026-03-08 20:52 ` Nirmoy Das
2026-03-30 12:51 ` Jason Gunthorpe
2026-03-31 8:40 ` Tian, Kevin
2026-03-31 12:08 ` Jason Gunthorpe
2026-04-01 8:15 ` Tian, Kevin
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