* [PATCH v4 1/5] arm64: dts: rockchip: Add USB nodes for RK3528
2026-05-29 19:03 [PATCH v4 0/5] rockchip: add USB nodes for RK3528 Heiko Stuebner
@ 2026-05-29 19:03 ` Heiko Stuebner
2026-05-29 19:03 ` [PATCH v4 2/5] arm64: dts: rockchip: Enable USB 2.0 ports on Radxa E20C Heiko Stuebner
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Heiko Stuebner @ 2026-05-29 19:03 UTC (permalink / raw)
To: heiko; +Cc: linux-rockchip, linux-arm-kernel, linux-kernel, amadeus, jonas
From: Jonas Karlman <jonas@kwiboo•se>
Rockchip RK3528 has one USB 3.0 DWC3 controller and oneUSB 2.0 EHCI/OHCI
controller and uses an Innosilicon-USB2PHY for USB 2.0. The DWC3
controller additionally uses the Naneng Combo PHY for USB3.
Add device tree nodes to describe these USB controllers along with the
USB 2.0 PHYs.
Signed-off-by: Jonas Karlman <jonas@kwiboo•se>
[moved snps,dis_u2_susphy_quirk here from individual boards,
describe both usb2+3 default phy connections, usb2 boards can override]
Signed-off-by: Heiko Stuebner <heiko@sntech•de>
---
arch/arm64/boot/dts/rockchip/rk3528.dtsi | 80 ++++++++++++++++++++++++
1 file changed, 80 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
index 77d314716b43..03cd00f88dbb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
@@ -336,6 +336,33 @@ pcie_intc: legacy-interrupt-controller {
};
};
+ usb_host0_xhci: usb@fe500000 {
+ compatible = "rockchip,rk3528-dwc3", "snps,dwc3";
+ reg = <0x0 0xfe500000 0x0 0x400000>;
+ clocks = <&cru CLK_REF_USB3OTG>,
+ <&cru CLK_SUSPEND_USB3OTG>,
+ <&cru ACLK_USB3OTG>;
+ clock-names = "ref_clk", "suspend_clk", "bus_clk";
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&power RK3528_PD_VPU>;
+ resets = <&cru SRST_A_USB3OTG>;
+ dr_mode = "otg";
+ phys = <&usb2phy_otg>, <&combphy PHY_TYPE_USB3>;
+ phy-names = "usb2-phy", "usb3-phy";
+ phy_type = "utmi_wide";
+ snps,dis_enblslpm_quirk;
+ snps,dis_rxdet_inp3_quirk;
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis_u2_susphy_quirk;
+ snps,parkmode-disable-hs-quirk;
+ snps,parkmode-disable-ss-quirk;
+ status = "disabled";
+ };
+
gic: interrupt-controller@fed01000 {
compatible = "arm,gic-400";
reg = <0x0 0xfed01000 0 0x1000>,
@@ -349,6 +376,30 @@ gic: interrupt-controller@fed01000 {
#interrupt-cells = <3>;
};
+ usb_host0_ehci: usb@ff100000 {
+ compatible = "generic-ehci";
+ reg = <0x0 0xff100000 0x0 0x40000>;
+ clocks = <&cru HCLK_USBHOST>, <&cru HCLK_USBHOST_ARB>,
+ <&usb2phy>;
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb2phy_host>;
+ phy-names = "usb";
+ power-domains = <&power RK3528_PD_VO>;
+ status = "disabled";
+ };
+
+ usb_host0_ohci: usb@ff140000 {
+ compatible = "generic-ohci";
+ reg = <0x0 0xff140000 0x0 0x40000>;
+ clocks = <&cru HCLK_USBHOST>, <&cru HCLK_USBHOST_ARB>,
+ <&usb2phy>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb2phy_host>;
+ phy-names = "usb";
+ power-domains = <&power RK3528_PD_VO>;
+ status = "disabled";
+ };
+
qos_crypto_a: qos@ff200000 {
compatible = "rockchip,rk3528-qos", "syscon";
reg = <0x0 0xff200000 0x0 0x20>;
@@ -1281,6 +1332,35 @@ combphy: phy@ffdc0000 {
rockchip,pipe-phy-grf = <&pipe_phy_grf>;
status = "disabled";
};
+
+ usb2phy: usb2phy@ffdf0000 {
+ compatible = "rockchip,rk3528-usb2phy";
+ reg = <0x0 0xffdf0000 0x0 0x10000>;
+ clocks = <&cru CLK_REF_USBPHY>, <&cru PCLK_USBPHY>;
+ clock-names = "phyclk", "pclk";
+ #clock-cells = <0>;
+ clock-output-names = "clk_usbphy_480m";
+ power-domains = <&power RK3528_PD_VO>;
+ rockchip,usbgrf = <&vo_grf>;
+ status = "disabled";
+
+ usb2phy_otg: otg-port {
+ interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "otg-bvalid", "otg-id",
+ "linestate";
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ usb2phy_host: host-port {
+ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "linestate";
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+ };
};
};
--
2.47.3
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v4 2/5] arm64: dts: rockchip: Enable USB 2.0 ports on Radxa E20C
2026-05-29 19:03 [PATCH v4 0/5] rockchip: add USB nodes for RK3528 Heiko Stuebner
2026-05-29 19:03 ` [PATCH v4 1/5] arm64: dts: rockchip: Add " Heiko Stuebner
@ 2026-05-29 19:03 ` Heiko Stuebner
2026-05-29 19:03 ` [PATCH v4 3/5] arm64: dts: rockchip: Enable USB ports on Radxa ROCK 2A/2F Heiko Stuebner
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Heiko Stuebner @ 2026-05-29 19:03 UTC (permalink / raw)
To: heiko; +Cc: linux-rockchip, linux-arm-kernel, linux-kernel, amadeus, jonas
From: Jonas Karlman <jonas@kwiboo•se>
The Radxa E20C has one USB2.0 Type-A HOST port and one USB2.0 Type-C port.
The Type-C port is conneced to a FE1.1s_QFN USB hub on the board, with its
ports being connected to the XHCI usb controller and an usb-uart bridge.
This also means, the XHCI controller can only be used in device-mode.
Add support for using the USB 2.0 ports on Radxa E20C.
Signed-off-by: Jonas Karlman <jonas@kwiboo•se>
[set xhci to peripheral and add comment about the outward-facing hub]
Signed-off-by: Heiko Stuebner <heiko@sntech•de>
---
.../boot/dts/rockchip/rk3528-radxa-e20c.dts | 60 +++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
index b32452756155..f872b8d20ebc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
@@ -134,6 +134,18 @@ vcc5v0_sys: regulator-5v0-vcc-sys {
regulator-max-microvolt = <5000000>;
};
+ vcc5v0_usb20: regulator-5v0-vcc-usb20 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_host_en>;
+ regulator-name = "vcc5v0_usb20";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
vccio_sd: regulator-vccio-sd {
compatible = "regulator-gpio";
gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
@@ -273,6 +285,12 @@ sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ usb {
+ usb_host_en: usb-host-en {
+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pwm1 {
@@ -320,3 +338,45 @@ &uart0 {
pinctrl-0 = <&uart0m0_xfer>;
status = "okay";
};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+/*
+ * The usb controller can only work in peripheral mode, as it is
+ * connected to one of the ports of an outward-facing usb hub.
+ *
+ * type_c-port (hub-input)
+ * |
+ * usb-hub
+ * | |
+ * uart-usb usb-host0
+ * |
+ * uart0
+ */
+&usb_host0_xhci {
+ dr_mode = "peripheral";
+ extcon = <&usb2phy>;
+ maximum-speed = "high-speed";
+ phys = <&usb2phy_otg>;
+ phy-names = "usb2-phy";
+ status = "okay";
+};
+
+&usb2phy {
+ status = "okay";
+};
+
+&usb2phy_host {
+ phy-supply = <&vcc5v0_usb20>;
+ status = "okay";
+};
+
+&usb2phy_otg {
+ status = "okay";
+};
--
2.47.3
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v4 3/5] arm64: dts: rockchip: Enable USB ports on Radxa ROCK 2A/2F
2026-05-29 19:03 [PATCH v4 0/5] rockchip: add USB nodes for RK3528 Heiko Stuebner
2026-05-29 19:03 ` [PATCH v4 1/5] arm64: dts: rockchip: Add " Heiko Stuebner
2026-05-29 19:03 ` [PATCH v4 2/5] arm64: dts: rockchip: Enable USB 2.0 ports on Radxa E20C Heiko Stuebner
@ 2026-05-29 19:03 ` Heiko Stuebner
2026-05-29 19:03 ` [PATCH v4 4/5] arm64: dts: rockchip: Enable USB 2.0 ports on ArmSoM Sige1 Heiko Stuebner
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Heiko Stuebner @ 2026-05-29 19:03 UTC (permalink / raw)
To: heiko; +Cc: linux-rockchip, linux-arm-kernel, linux-kernel, amadeus, jonas
From: Jonas Karlman <jonas@kwiboo•se>
The ROCK 2A has three USB 2.0 Type-A HOST ports behind an onboard
USB hub, and one USB 3.0 Type-A port.
And the ROCK 2F has two USB 2.0 Type-A HOST ports behind an onboard
USB hub, and one USB 2.0 Type-C OTG port.
Add support for using the USB ports on Radxa ROCK 2A/2F.
The onboard USB hub handles OHCI so only the EHCI controller is enabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo•se>
Signed-off-by: Heiko Stuebner <heiko@sntech•de>
---
arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi | 17 +++++++++++++++++
arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts | 11 +++++++++++
arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts | 12 ++++++++++++
3 files changed, 40 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi b/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi
index aedc7ee9ee46..501a91f4c23e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi
@@ -166,6 +166,10 @@ rfkill {
};
};
+&combphy {
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <&vdd_arm>;
};
@@ -291,3 +295,16 @@ &uart0 {
pinctrl-0 = <&uart0m0_xfer>;
status = "okay";
};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb2phy {
+ status = "okay";
+};
+
+&usb2phy_host {
+ phy-supply = <&vcc5v0_usb20>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts b/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts
index 0b696d49b71f..5e17ec2758d5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts
@@ -79,3 +79,14 @@ usb_otg_en: usb-otg-en {
};
};
};
+
+&usb_host0_xhci {
+ dr_mode = "host";
+ extcon = <&usb2phy>;
+ status = "okay";
+};
+
+&usb2phy_otg {
+ phy-supply = <&vcc5v0_usb30_otg>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts b/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts
index 3e2b9b685cb2..f2b021ff5046 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts
@@ -8,3 +8,15 @@ / {
model = "Radxa ROCK 2F";
compatible = "radxa,rock-2f", "rockchip,rk3528";
};
+
+&usb_host0_xhci {
+ extcon = <&usb2phy>;
+ maximum-speed = "high-speed";
+ phys = <&usb2phy_otg>;
+ phy-names = "usb2-phy";
+ status = "okay";
+};
+
+&usb2phy_otg {
+ status = "okay";
+};
--
2.47.3
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v4 4/5] arm64: dts: rockchip: Enable USB 2.0 ports on ArmSoM Sige1
2026-05-29 19:03 [PATCH v4 0/5] rockchip: add USB nodes for RK3528 Heiko Stuebner
` (2 preceding siblings ...)
2026-05-29 19:03 ` [PATCH v4 3/5] arm64: dts: rockchip: Enable USB ports on Radxa ROCK 2A/2F Heiko Stuebner
@ 2026-05-29 19:03 ` Heiko Stuebner
2026-05-29 19:03 ` [PATCH v4 5/5] arm64: dts: rockchip: Enable USB 2.0 ports on NanoPi Zero2 Heiko Stuebner
2026-06-02 21:14 ` [PATCH v4 0/5] rockchip: add USB nodes for RK3528 Heiko Stuebner
5 siblings, 0 replies; 7+ messages in thread
From: Heiko Stuebner @ 2026-05-29 19:03 UTC (permalink / raw)
To: heiko; +Cc: linux-rockchip, linux-arm-kernel, linux-kernel, amadeus, jonas
From: Jonas Karlman <jonas@kwiboo•se>
The ArmSoM Sige1 has two USB 2.0 Type-A HOST ports behind an onboard
USB hub, and one USB 2.0 Type-C OTG port.
Add support for using the USB 2.0 ports on ArmSoM Sige1.
The onboard USB hub handles OHCI so only the EHCI controller is enabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo•se>
[added phy-supply for otg port]
Signed-off-by: Heiko Stuebner <heiko@sntech•de>
---
.../boot/dts/rockchip/rk3528-armsom-sige1.dts | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts b/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts
index c41af8fc0c8d..ee4183fb980d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts
@@ -480,3 +480,28 @@ bluetooth {
vddio-supply = <&vcc_1v8>;
};
};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ extcon = <&usb2phy>;
+ maximum-speed = "high-speed";
+ phys = <&usb2phy_otg>;
+ phy-names = "usb2-phy";
+ status = "okay";
+};
+
+&usb2phy {
+ status = "okay";
+};
+
+&usb2phy_host {
+ status = "okay";
+};
+
+&usb2phy_otg {
+ phy-supply = <&vcc5v0_usb_otg>;
+ status = "okay";
+};
--
2.47.3
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v4 5/5] arm64: dts: rockchip: Enable USB 2.0 ports on NanoPi Zero2
2026-05-29 19:03 [PATCH v4 0/5] rockchip: add USB nodes for RK3528 Heiko Stuebner
` (3 preceding siblings ...)
2026-05-29 19:03 ` [PATCH v4 4/5] arm64: dts: rockchip: Enable USB 2.0 ports on ArmSoM Sige1 Heiko Stuebner
@ 2026-05-29 19:03 ` Heiko Stuebner
2026-06-02 21:14 ` [PATCH v4 0/5] rockchip: add USB nodes for RK3528 Heiko Stuebner
5 siblings, 0 replies; 7+ messages in thread
From: Heiko Stuebner @ 2026-05-29 19:03 UTC (permalink / raw)
To: heiko; +Cc: linux-rockchip, linux-arm-kernel, linux-kernel, amadeus, jonas
From: Jonas Karlman <jonas@kwiboo•se>
The NanoPi Zero2 has one USB 2.0 Type-A HOST port and one USB 2.0 Type-C
OTG port.
Add support for using the USB 2.0 ports on NanoPi Zero2.
Signed-off-by: Jonas Karlman <jonas@kwiboo•se>
Signed-off-by: Heiko Stuebner <heiko@sntech•de>
---
.../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 29 +++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
index 9f683033c5f3..97d85124d21b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts
@@ -338,3 +338,32 @@ &uart0 {
pinctrl-0 = <&uart0m0_xfer>;
status = "okay";
};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ extcon = <&usb2phy>;
+ maximum-speed = "high-speed";
+ phys = <&usb2phy_otg>;
+ phy-names = "usb2-phy";
+ status = "okay";
+};
+
+&usb2phy {
+ status = "okay";
+};
+
+&usb2phy_host {
+ phy-supply = <&usb2_host_5v>;
+ status = "okay";
+};
+
+&usb2phy_otg {
+ status = "okay";
+};
--
2.47.3
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v4 0/5] rockchip: add USB nodes for RK3528
2026-05-29 19:03 [PATCH v4 0/5] rockchip: add USB nodes for RK3528 Heiko Stuebner
` (4 preceding siblings ...)
2026-05-29 19:03 ` [PATCH v4 5/5] arm64: dts: rockchip: Enable USB 2.0 ports on NanoPi Zero2 Heiko Stuebner
@ 2026-06-02 21:14 ` Heiko Stuebner
5 siblings, 0 replies; 7+ messages in thread
From: Heiko Stuebner @ 2026-06-02 21:14 UTC (permalink / raw)
To: Heiko Stuebner
Cc: linux-rockchip, linux-arm-kernel, linux-kernel, amadeus, jonas
On Fri, 29 May 2026 21:03:50 +0200, Heiko Stuebner wrote:
> This adds the USB nodes to RK3528 and therefore needs both the dwc3
> compatible [0], as well as the phy support [1] to be merged first.
>
> changes in v4:
> - phy-supply not vbus-supply on armsom sige1
> - adapt e20c commit message explaining the hub
> - describe my changes to the original patches inside them
>
> [...]
Applied, thanks!
[1/5] arm64: dts: rockchip: Add USB nodes for RK3528
commit: 5f3ae9b12a6c523992a7216bbc4420ac33450b79
[2/5] arm64: dts: rockchip: Enable USB 2.0 ports on Radxa E20C
commit: e897bcf81dd920bf80ace6d98ec6f9645c5b50f2
[3/5] arm64: dts: rockchip: Enable USB ports on Radxa ROCK 2A/2F
commit: 4e55d52f5f3b333a9ff5103099df97291aaeb083
[4/5] arm64: dts: rockchip: Enable USB 2.0 ports on ArmSoM Sige1
commit: b6b74087f90a201cfdd6da6a43e7b92dba8370e3
[5/5] arm64: dts: rockchip: Enable USB 2.0 ports on NanoPi Zero2
commit: ff660109f4129a13bbdc31bc14ca233ebf0c9450
Best regards,
--
Heiko Stuebner <heiko@sntech•de>
^ permalink raw reply [flat|nested] 7+ messages in thread