From: swarren@wwwdotorg•org (Stephen Warren)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCHv4 3/7] iommu/tegra: smmu: Register IOMMU'able devices dynamically
Date: Tue, 12 Nov 2013 16:53:17 -0700 [thread overview]
Message-ID: <5282BF6D.8070801@wwwdotorg.org> (raw)
In-Reply-To: <1384158718-4756-4-git-send-email-hdoyu@nvidia.com>
On 11/11/2013 01:31 AM, Hiroshi Doyu wrote:
> platform_devices are registered as IOMMU'able dynamically via
> add_device() and remove_device().
>
> Tegra SMMU can have multiple address spaces(AS). IOMMU'able devices
> can belong to one of them. Multiple IOVA maps are created at boot-up,
> which can be attached to devices later. We reserve 2 of them for
> static assignment, AS[0] for system default, AS[1] for AHB clusters as
> protected domain from others, where there are many traditional
> pheripheral devices like USB, SD/MMC. They should be isolated from
> some smart devices like host1x for system robustness. Even if smart
> devices behaves wrongly, the traditional devices(SD/MMC, USB) wouldn't
> be affected, and the system could continue most likely. DMA API(ARM)
> needs ARM_DMA_USE_IOMMU to be enabled.
> diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
> +enum {
> + SYSTEM_DEFAULT,
> + SYSTEM_PROTECTED,
> +};
> +
...
> +static int smmu_iommu_add_device(struct device *dev)
...
> + switch (swgroups) {
> + case TEGRA_SWGROUP_BIT(PPCS):
> + map = smmu_handle->map[SYSTEM_PROTECTED];
> + break;
> + default:
> + map = smmu_handle->map[SYSTEM_DEFAULT];
> + break;
> + }
As I think I mentioned before, this hard-codes some valid ASIDs.
However, the number of valid ASIDs is configured dynamically from DT, in
tegra_smmu_probe(), via:
static int tegra_smmu_probe(struct platform_device *pdev)
...
int i, asids, err = 0;
...
if (of_property_read_u32(dev->of_node, "nvidia,#asids", &asids))
return -ENODEV;
...
smmu->num_as = asids;
Shouldn't tegra_smmu_probe() validate that asids >= SYSTEM_PROTECTED, or
similar?
next prev parent reply other threads:[~2013-11-12 23:53 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-11 8:31 [PATCHv4 0/7] Unifying SMMU driver among Tegra SoCs Hiroshi Doyu
2013-11-11 8:31 ` [PATCHv4 1/7] ARM: tegra: Create a DT header defining SWGROUP ID Hiroshi Doyu
2013-11-12 22:48 ` Stephen Warren
2013-11-15 10:29 ` Hiroshi Doyu
2013-11-15 16:44 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 2/7] driver/core: Populate IOMMU'able devices in order Hiroshi Doyu
2013-11-11 11:39 ` Will Deacon
2013-11-12 23:30 ` Stephen Warren
2013-11-12 23:34 ` Stephen Warren
2013-11-13 7:23 ` Hiroshi Doyu
2013-11-13 17:49 ` Stephen Warren
2013-11-13 14:38 ` Will Deacon
2013-11-13 16:06 ` Hiroshi Doyu
2013-11-13 17:31 ` Will Deacon
2013-11-13 17:53 ` Stephen Warren
2013-11-14 16:16 ` Will Deacon
2013-11-13 17:45 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 3/7] iommu/tegra: smmu: Register IOMMU'able devices dynamically Hiroshi Doyu
2013-11-12 23:53 ` Stephen Warren [this message]
2013-11-12 23:58 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 4/7] iommu/tegra: smmu: Calculate ASID register offset by ID Hiroshi Doyu
2013-11-13 0:02 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 5/7] iommu/tegra: smmu: Support "mmu-masters" binding Hiroshi Doyu
2013-11-11 11:35 ` Will Deacon
2013-11-11 12:03 ` Hiroshi Doyu
2013-11-13 0:17 ` Stephen Warren
2013-11-13 7:45 ` Hiroshi Doyu
2013-11-13 17:58 ` Stephen Warren
2013-11-14 6:41 ` Hiroshi Doyu
2013-11-14 16:59 ` Stephen Warren
2013-11-13 11:15 ` Kumar Gala
2013-11-11 8:31 ` [PATCHv4 6/7] iommu/tegra: smmu: Rename hwgrp -> swgroups Hiroshi Doyu
2013-11-11 8:31 ` [PATCHv4 7/7] iommu/tegra: smmu: Allow duplicate ASID wirte Hiroshi Doyu
2013-11-13 0:27 ` Stephen Warren
2013-11-12 22:40 ` [PATCHv4 0/7] Unifying SMMU driver among Tegra SoCs Stephen Warren
2013-11-13 6:04 ` Hiroshi Doyu
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