From: swarren@wwwdotorg•org (Stephen Warren)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCHv4 5/7] iommu/tegra: smmu: Support "mmu-masters" binding
Date: Thu, 14 Nov 2013 09:59:11 -0700 [thread overview]
Message-ID: <5285015F.4090003@wwwdotorg.org> (raw)
In-Reply-To: <20131114.084145.998129499909471378.hdoyu@nvidia.com>
On 11/13/2013 11:41 PM, Hiroshi Doyu wrote:
> Stephen Warren <swarren@wwwdotorg•org> wrote @ Wed, 13 Nov 2013 18:58:23 +0100:
>
>>> smmu: iommu at xxxxxx {
>>> #iommu-cells = <3>;
>>> ^^^^^^^^^^^^^^^^^^
>>> };
>>>
>>> host1x {
>>> compatible = "nvidia,tegra30-host1x", "simple-bus";
>>> iommu = <&smmu 0x??????? 0x??????? "asid">;
>>> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^#######
>>> gr3d {
>>> compatible = "nvidia,tegra30-gr3d";
>>> iommu = <&smmu 0x??????? 0x???????>;
>>> }
>>>
>>> I think that this "asid" part can be set 0 in tegra??.dtsi and the
>>> actual value can be overwritten in tegra??-<boardname>.dts file.
>>
>> The one issue here is that we can only override entire properties, so
>> it's not possible for a board file to *just* replace the ASID, it'd have
>> to duplicate the entire property, just to change the one value.
>>
>> Is the ASID mapping really likely to be board-specific though? To my
>> naive thinking, it seems that the chip design (e.g. number of
>> peripherals, number of available ASIDs) would tend to imply the
>> device->ASID mapping, since it would have been considered as part of
>> chip design. Hence, wouldn't soc.dtsi typically specify the expected
>> ASID mapping, and boards rarely if ever override it?
>>
>> If the ASID mapping really is likely to vary per board, perhaps it makes
>> sense to put it into a separate property somehow so it's easier to override?
>
> Older Tegra like T30: swgroups > asid(==4)
> Newer Tegra : swgroups < asid
In that case, I'd vote for hard-coding the mapping in the driver in all
cases. For older Tegra, we'll have to hard-code some static mapping just
like you've already done in the driver. For newer Tegra, we would just
assign a new AS for each swgroup as you say. If we ever need to tweak
this, we can invent a new DT property to affect the default. That makes
the DT content quite a bit simpler for now:-)
next prev parent reply other threads:[~2013-11-14 16:59 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-11 8:31 [PATCHv4 0/7] Unifying SMMU driver among Tegra SoCs Hiroshi Doyu
2013-11-11 8:31 ` [PATCHv4 1/7] ARM: tegra: Create a DT header defining SWGROUP ID Hiroshi Doyu
2013-11-12 22:48 ` Stephen Warren
2013-11-15 10:29 ` Hiroshi Doyu
2013-11-15 16:44 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 2/7] driver/core: Populate IOMMU'able devices in order Hiroshi Doyu
2013-11-11 11:39 ` Will Deacon
2013-11-12 23:30 ` Stephen Warren
2013-11-12 23:34 ` Stephen Warren
2013-11-13 7:23 ` Hiroshi Doyu
2013-11-13 17:49 ` Stephen Warren
2013-11-13 14:38 ` Will Deacon
2013-11-13 16:06 ` Hiroshi Doyu
2013-11-13 17:31 ` Will Deacon
2013-11-13 17:53 ` Stephen Warren
2013-11-14 16:16 ` Will Deacon
2013-11-13 17:45 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 3/7] iommu/tegra: smmu: Register IOMMU'able devices dynamically Hiroshi Doyu
2013-11-12 23:53 ` Stephen Warren
2013-11-12 23:58 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 4/7] iommu/tegra: smmu: Calculate ASID register offset by ID Hiroshi Doyu
2013-11-13 0:02 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 5/7] iommu/tegra: smmu: Support "mmu-masters" binding Hiroshi Doyu
2013-11-11 11:35 ` Will Deacon
2013-11-11 12:03 ` Hiroshi Doyu
2013-11-13 0:17 ` Stephen Warren
2013-11-13 7:45 ` Hiroshi Doyu
2013-11-13 17:58 ` Stephen Warren
2013-11-14 6:41 ` Hiroshi Doyu
2013-11-14 16:59 ` Stephen Warren [this message]
2013-11-13 11:15 ` Kumar Gala
2013-11-11 8:31 ` [PATCHv4 6/7] iommu/tegra: smmu: Rename hwgrp -> swgroups Hiroshi Doyu
2013-11-11 8:31 ` [PATCHv4 7/7] iommu/tegra: smmu: Allow duplicate ASID wirte Hiroshi Doyu
2013-11-13 0:27 ` Stephen Warren
2013-11-12 22:40 ` [PATCHv4 0/7] Unifying SMMU driver among Tegra SoCs Stephen Warren
2013-11-13 6:04 ` Hiroshi Doyu
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