From: info@free-electrons•com (Gregory CLEMENT)
To: linux-arm-kernel@lists•infradead.org
Subject: [PATCH v4 07/13] ARM: dts: mvebu: Add a new set of registers to the PMSU node
Date: Wed, 19 Feb 2014 18:49:13 +0100 [thread overview]
Message-ID: <5304EE99.7000102@free-electrons.com> (raw)
In-Reply-To: <20140219170033.4ca8343b@skate>
On 19/02/2014 17:00, Thomas Petazzoni wrote:
> Dear Gregory CLEMENT,
>
> On Thu, 13 Feb 2014 18:33:30 +0100, Gregory CLEMENT wrote:
>
>> - reg: Should contain PMSU registers location and length. First pair
>> - for the per-CPU SW Reset Control registers, second pair for the
>> - Power Management Service Unit.
>> + for the per-CPU SW Reset Control registers, second pair for the CPU
>> + Power Management Service Unit registers, third pair for the Fabric Power
>> + Management Service Unit registers.
>>
>> Example:
>>
>> -armada-370-xp-pmsu at d0022000 {
>> +armada-370-xp-pmsu at 22000 {
>> compatible = "marvell,armada-370-xp-pmsu";
>> - reg = <0xd0022100 0x430>,
>> - <0xd0020800 0x20>;
>> + reg = <0x22100 0x430>,
>> + <0x20800 0x20>,
>> + <0x22000 0x24>;
>
> I am not too happy with this because:
>
> *) We have to remove the second register pair from the PMSU. I haven't
> yet posted the patches on LAKML for SMP on 375 and 38x, but the 375
> doesn't have a PMSU. It however has the same CPU reset control
> registers as 370 and XP. Therefore, these 0x20800 registers have to
> be handled by a separate driver (that uses the reset framework),
> and not handled by the PMSU driver. This way, Armada 370/XP can use
> PMSU+CPU reset, while 375 will only use CPU reset.
>
> *) I think making the PMSU register start at 0x22100 was a mistake.
> The PMSU registers actually start at 0x22000 and they seem to go all
> the way to 0x23000. So we should have only one register pair. This
> of course raises some backward compatibility questions for the DT.
I agree to use something like:
armada-370-xp-pmsu at 22000 {
compatible = "marvell,armada-xp-pmsu"; /* new compatible string */
reg = <0x22000 0x1000>;
};
and I think the best option would be to introduce a new compatible string
for this. In the same time we continue to support the old compatible string
but we print a big warning during the kernel boot that this compatible string
is deprecated, and we will finally remove it a few release.
Thanks,
Gregory
>
> Thomas
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
+33 602 196 044
next prev parent reply other threads:[~2014-02-19 17:49 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-13 17:33 [PATCH v4 00/13] CPU idle for Armada XP Gregory CLEMENT
2014-02-13 17:33 ` [PATCH v4 01/13] ARM: PJ4B: Add cpu_suspend/cpu_resume hooks for PJ4B Gregory CLEMENT
2014-02-14 16:06 ` Lorenzo Pieralisi
2014-03-25 22:57 ` Gregory CLEMENT
2014-02-13 17:33 ` [PATCH v4 02/13] ARM: mvebu: remove the address parameter for ll_set_cpu_coherent Gregory CLEMENT
2014-02-19 16:06 ` Thomas Petazzoni
2014-02-13 17:33 ` [PATCH v4 03/13] ARM: mvebu: ll_set_cpu_coherent always uses the current CPU Gregory CLEMENT
2014-02-19 16:09 ` Thomas Petazzoni
2014-02-19 16:17 ` Gregory CLEMENT
2014-02-13 17:33 ` [PATCH v4 04/13] ARM: mvebu: Remove the unused argument of set_cpu_coherent() Gregory CLEMENT
2014-02-19 16:27 ` Thomas Petazzoni
2014-02-13 17:33 ` [PATCH v4 05/13] ARM: mvebu: Low level function to disable HW coherency support Gregory CLEMENT
2014-02-13 17:33 ` [PATCH v4 06/13] ARM: mvebu: Add a new set of registers for pmsu Gregory CLEMENT
2014-02-13 17:33 ` [PATCH v4 07/13] ARM: dts: mvebu: Add a new set of registers to the PMSU node Gregory CLEMENT
2014-02-17 2:57 ` Jason Cooper
2014-02-19 16:00 ` Thomas Petazzoni
2014-02-19 17:49 ` Gregory CLEMENT [this message]
2014-02-19 18:21 ` Thomas Petazzoni
2014-02-13 17:33 ` [PATCH v4 08/13] ARM: mvebu: Allow to power down L2 cache controller in idle mode Gregory CLEMENT
2014-02-13 17:33 ` [PATCH v4 09/13] ARM: mvebu: Add the PMSU related part of the cpu idle functions Gregory CLEMENT
2014-02-13 17:33 ` [PATCH v4 10/13] ARM: mvebu: Set the start address of a CPU in a separate function Gregory CLEMENT
2014-02-13 17:33 ` [PATCH v4 11/13] ARM: mvebu: Register notifier callback for the cpuidle transition Gregory CLEMENT
2014-02-13 17:33 ` [PATCH v4 12/13] cpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC Gregory CLEMENT
2014-02-14 17:00 ` Lorenzo Pieralisi
2014-03-25 22:57 ` Gregory CLEMENT
2014-02-17 8:49 ` Daniel Lezcano
2014-03-25 22:57 ` Gregory CLEMENT
2014-02-19 16:51 ` Thomas Petazzoni
2014-02-19 17:19 ` Gregory CLEMENT
2014-02-19 18:32 ` Thomas Petazzoni
2014-02-13 17:33 ` [PATCH v4 13/13] ARM: mvebu: register the cpuidle driver for the Armada XP SoCs Gregory CLEMENT
2014-02-19 16:46 ` Thomas Petazzoni
2014-02-19 16:52 ` Gregory CLEMENT
2014-02-19 17:01 ` Thomas Petazzoni
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