From: Gerd Bayer <gbayer@linux•ibm.com>
To: Manivannan Sadhasivam <mani@kernel•org>,
Hans Zhang <hans.zhang@cixtech•com>
Cc: "Arnd Bergmann" <arnd@kernel•org>,
"Bjorn Helgaas" <helgaas@kernel•org>,
"Hans Zhang" <18255117159@163•com>,
bhelgaas@google•com, "Alexander Gordeev" <agordeev@linux•ibm.com>,
"Christian Borntraeger" <borntraeger@linux•ibm.com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux•intel.com>,
jingoohan1@gmail•com,
"Krzysztof Wilczyński" <kwilczynski@kernel•org>,
linux-kernel@vger•kernel.org, linux-s390@vger•kernel.org,
linux-next <linux-next@vger•kernel.org>,
linux-pci@vger•kernel.org,
"Lorenzo Pieralisi" <lpieralisi@kernel•org>,
"Rob Herring" <robh@kernel•org>,
"Niklas Schnelle" <schnelle@linux•ibm.com>,
geert@linux-m68k•org
Subject: Re: [PATCH] PCI: Fix endianness issues in pci_bus_read_config()
Date: Fri, 01 Aug 2025 13:30:27 +0200 [thread overview]
Message-ID: <06f16b1a55eede3dc3e0bf31ff14eca89ab6f009.camel@linux.ibm.com> (raw)
In-Reply-To: <cu7qdbwmnixqjce4aetr5ldwe3sqoixgq4fuzmzajzphjdywqq@yw6ojbgeqktm>
On Fri, 2025-08-01 at 16:24 +0530, Manivannan Sadhasivam wrote:
<--- snip --->
> > > > > > The pci_bus_read_config() interface itself may have been a
> > > > > > mistake, can't the callers just use the underlying helpers
> > > > > > directly?
> > > > > >
> > > > >
> > > > > They can! Since the callers of this API is mostly the macros, we can easily
> > > > > implement the logic to call relevant accessors based on the requested size.
> > > > >
> > > > > Hans, could you please respin the series based the feedback since the series is
> > > > > dropped for 6.17.
> > > > >
> > > >
> > > > Dear all,
> > > >
> > > > I am once again deeply sorry for the problems that occurred in this series.
> > > > I only test pulling the ARM platform.
> > > >
> > > > Thank you very much, Gerd, for reporting the problem.
no worries!
> > > > Thank you all for your discussions and suggestions for revision.
> > > >
> > > > Hi Mani,
> > > >
> > > > Geert provided a solution. My patch based on this is as follows. Please
> > > > check if there are any problems.
> > > > https://lore.kernel.org/linux-pci/CAMuHMdVwFeV46oCid_sMHjXfP+yyGTpBfs9t3uaa=wRxNcSOAQ@mail.gmail.com/
> > > >
> > > > Also, please ask Gerd to help test whether it works properly. Thank you very
> > > > much.
> > > >
I found Geert's proposal intriguing for a quick resolution of the
issue. Yet, I have not tried that proposal, though.
Instead I spent some more cycles on Lukas' and Mani's question about
the value of the pci_bus_read_config() helper. So I changed
PCI_FIND_NEXT_CAP and PCI_FIND_NEXT_EXT_CAP to use size-aware versions
of read_cfg accessor functions like this:
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index ac954584d991..9e2f75ede95f 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -109,17 +109,17 @@ int pci_bus_read_config(void *priv, unsigned int
devfn, int where, u32 size,
({
\
int __ttl = PCI_FIND_CAP_TTL;
\
u8 __id, __found_pos = 0;
\
- u32 __pos = (start);
\
- u32 __ent;
\
+ u8 __pos = (start);
\
+ u16 __ent;
\
\
- read_cfg(args, __pos, 1, &__pos);
\
+ read_cfg##_byte(args, __pos, &__pos);
\
\
while (__ttl--) {
\
if (__pos < PCI_STD_HEADER_SIZEOF)
\
break;
\
\
__pos = ALIGN_DOWN(__pos, 4);
\
- read_cfg(args, __pos, 2, &__ent);
\
+ read_cfg##_word(args, __pos, &__ent);
\
\
__id = FIELD_GET(PCI_CAP_ID_MASK, __ent);
\
if (__id == 0xff)
\
@@ -158,7 +158,7 @@ int pci_bus_read_config(void *priv, unsigned int
devfn, int where, u32 size,
\
__ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
\
while (__ttl-- > 0 && __pos >= PCI_CFG_SPACE_SIZE) {
\
- __ret = read_cfg(args, __pos, 4, &__header);
\
+ __ret = read_cfg##_dword(args, __pos, &__header);
\
if (__ret != PCIBIOS_SUCCESSFUL)
\
break;
\
\
This fixes the issue for s390's use-cases. With that
pci_bus_read_config() becomes unused - and could be removed in further
refinements.
However, this probably breaks your dwc and cdns use-cases. I think,
with the accessor functions for dwc and cadence changed to follow the
{_byte|_word|_dword} naming pattern they could be used straight out of
PCI_FIND_NEXT_{EXT_}CAP, too. Then, dw_pcie_read_cfg() and
cdns_pcie_read_cfg become obsolete as well.
Thoughts?
next prev parent reply other threads:[~2025-08-01 11:30 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20250716231121.GA2564572@bhelgaas>
2025-07-31 7:32 ` [REGRESSION] next/master: suspect endianness issue in common PCI capability search macro Gerd Bayer
2025-07-31 17:38 ` [PATCH] PCI: Fix endianness issues in pci_bus_read_config() Gerd Bayer
2025-07-31 18:39 ` Bjorn Helgaas
2025-07-31 19:01 ` Arnd Bergmann
2025-08-01 8:18 ` Manivannan Sadhasivam
2025-08-01 9:25 ` Hans Zhang
2025-08-01 9:47 ` Manivannan Sadhasivam
2025-08-01 10:06 ` Hans Zhang
2025-08-01 10:54 ` Manivannan Sadhasivam
2025-08-01 11:30 ` Gerd Bayer [this message]
2025-08-01 16:54 ` Hans Zhang
2025-08-01 18:08 ` Keith Busch
2025-08-02 15:23 ` Hans Zhang
2025-08-02 15:40 ` Arnd Bergmann
2025-08-04 3:06 ` Hans Zhang
2025-08-04 8:03 ` Arnd Bergmann
2025-08-04 8:25 ` Hans Zhang
2025-08-04 10:09 ` Gerd Bayer
2025-08-12 14:44 ` Hans Zhang
2025-08-13 7:47 ` Niklas Schnelle
2025-08-13 7:50 ` Hans Zhang
2025-08-04 14:33 ` Bjorn Helgaas
2025-08-04 15:04 ` Hans Zhang
2025-08-01 16:47 ` Hans Zhang
2025-07-31 18:53 ` Lukas Wunner
2025-08-01 7:52 ` Geert Uytterhoeven
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